From 838a59cae36f2bbf4d444270ca407f9e24458517 Mon Sep 17 00:00:00 2001 From: Ethan Bitnun Date: Mon, 12 Feb 2024 18:02:33 -0500 Subject: drm/amd/display: Improve the log precision The previous assumption that there will be an optimize_bandwidth call following every prepare_bandwidth call was incorrect and caused small inaccuracies in logging, as some info was only updated in later prepare calls. Reviewed-by: Leo Li Signed-off-by: Ethan Bitnun Reviewed-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c index 358a83b1114b..7eecb3403f74 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c @@ -830,7 +830,7 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base, dmcu->funcs->set_psr_wait_loop(dmcu, clk_mgr_base->clks.dispclk_khz / 1000 / 7); - if (dc->config.enable_auto_dpm_test_logs && safe_to_lower) { + if (dc->config.enable_auto_dpm_test_logs) { dcn32_auto_dpm_test_log(new_clocks, clk_mgr, context); } } -- cgit v1.2.3