From 57a2d0c1b27dd0a92d4d22818176e7f53eed3104 Mon Sep 17 00:00:00 2001 From: Sven Peter Date: Thu, 2 Jun 2022 19:31:44 +0200 Subject: MAINTAINERS: add ARM/APPLE MACHINE mailing list Signed-off-by: Sven Peter Reviewed-by: Alyssa Rosenzweig Signed-off-by: Hector Martin --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a6d3bd9d2a8d..1b457de37989 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1823,6 +1823,7 @@ ARM/APPLE MACHINE SUPPORT M: Hector Martin M: Sven Peter R: Alyssa Rosenzweig +L: asahi@lists.linux.dev L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained W: https://asahilinux.org -- cgit v1.2.3 From c02b60cb25289289cb7c1d0307d15a526b9e6669 Mon Sep 17 00:00:00 2001 From: Hector Martin Date: Thu, 2 Jun 2022 19:42:12 +0200 Subject: arm64: dts: apple: Re-parent ANS2 power domains Turns out that the APCIE_ST*_SYS domains do hard-depend on ANS2, so without this they refuse to power up. Reviewed-by: Sven Peter Signed-off-by: Sven Peter Signed-off-by: Hector Martin --- arch/arm64/boot/dts/apple/t8103-pmgr.dtsi | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi index fc51bc872468..a6dbb1f485d8 100644 --- a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi @@ -725,11 +725,6 @@ #power-domain-cells = <0>; #reset-cells = <0>; label = "ans2"; - /* - * The ADT makes ps_apcie_st depend on ps_ans2 instead, but this - * doesn't make much sense since ANS2 uses APCIE_ST. - */ - power-domains = <&ps_apcie_st>; }; ps_gfx: power-controller@3f8 { @@ -836,7 +831,7 @@ #power-domain-cells = <0>; #reset-cells = <0>; label = "apcie_st"; - power-domains = <&ps_apcie>; + power-domains = <&ps_apcie>, <&ps_ans2>; }; ps_ane_sys: power-controller@470 { -- cgit v1.2.3 From b6b9585876da018bdde2d5f15d206a689c0d70f3 Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Fri, 17 Jun 2022 12:37:30 +0200 Subject: reset: microchip-sparx5: allow building as a module MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set RESET_MCHP_SPARX5 as a tristate and add MODULE_DEVICE_TABLE() to allow building this driver as a module. Signed-off-by: Clément Léger Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220617103730.490588-1-clement.leger@bootlin.com --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 8 ++------ 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 93c8d07ee328..5afbe2daecb1 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -115,7 +115,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" + tristate "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 00b612a0effa..3d54dda3593e 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -149,6 +149,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -158,12 +159,7 @@ static struct platform_driver mchp_sparx5_reset_driver = { }, }; -static int __init mchp_sparx5_reset_init(void) -{ - return platform_driver_register(&mchp_sparx5_reset_driver); -} - -postcore_initcall(mchp_sparx5_reset_init); +module_platform_driver(mchp_sparx5_reset_driver); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); -- cgit v1.2.3 From 18d1909be3451e1a2e322e9035f03d0a18f7bee8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 8 Jul 2022 17:56:56 +0100 Subject: reset: allow building of reset simple driver if expert config selected If CONFIG_EXPERT is selected, allow selection of CONFIG_RESET_SIMPLE if needed by the user. Signed-off-by: Ben Dooks Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220708165656.269507-1-ben.dooks@sifive.com --- drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5afbe2daecb1..e52f29a555e9 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -200,7 +200,7 @@ config RESET_SCMI firmware controlling all the reset signals. config RESET_SIMPLE - bool "Simple Reset Controller Driver" if COMPILE_TEST + bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC help This enables a simple reset controller driver for reset lines that -- cgit v1.2.3 From af19f1936d63f8aefeca61a5410f8908e0f11f56 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Mon, 11 Jul 2022 15:06:24 +0200 Subject: reset: a10sr: allow building under COMPILE_TEST This driver can be built under COMPILE_TEST. Allow it. Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220711130624.1217599-1-p.zabel@pengutronix.de --- drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index e52f29a555e9..d9a08ec343e2 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -17,7 +17,7 @@ if RESET_CONTROLLER config RESET_A10SR tristate "Altera Arria10 System Resource Reset" - depends on MFD_ALTERA_A10SR + depends on MFD_ALTERA_A10SR || COMPILE_TEST help This option enables support for the external reset functions for peripheral PHYs on the Altera Arria10 System Resource Chip. -- cgit v1.2.3 From 096e772b1cdcc201ea10a5bd83f280f665444704 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 13 Jul 2022 10:40:10 +0200 Subject: Revert "reset: microchip-sparx5: allow building as a module" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit b6b9585876da018bdde2d5f15d206a689c0d70f3. This breaks MDIO on kswitch-d10, presumably because the global switch reset is not released early enough anymore. Reported-by: Michael Walle Cc: Clément Léger Signed-off-by: Philipp Zabel Tested-by: Michael Walle Link: https://lore.kernel.org/r/20220713084010.168720-1-p.zabel@pengutronix.de --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index d9a08ec343e2..f9a7cee01659 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -115,7 +115,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - tristate "Microchip Sparx5 reset driver" + bool "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 3d54dda3593e..00b612a0effa 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -149,7 +149,6 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; -MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -159,7 +158,12 @@ static struct platform_driver mchp_sparx5_reset_driver = { }, }; -module_platform_driver(mchp_sparx5_reset_driver); +static int __init mchp_sparx5_reset_init(void) +{ + return platform_driver_register(&mchp_sparx5_reset_driver); +} + +postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); -- cgit v1.2.3 From c4ada3ca99b20df0dd6323b7a670e6d12fa9e6f9 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 19 Jul 2022 09:52:00 +0100 Subject: reset: reset-simple should depends on HAS_IOMEM The reset-simple driver does not build on all architecuters as it requires devm_ioremap_resource() which is only built when CONFIG_HAS_IOMEM is enabled in the kenrel. Fix the following error by depending on CONFIG_HAS_IOMEM: drivers/reset/reset-simple.o: in function `reset_simple_probe': reset-simple.c:(.text+0x3aa): undefined reference to `devm_ioremap_resource' Fixes: 18d1909be345 ("reset: allow building of reset simple driver if expert config selected") Reported-by: kernel test robot Signed-off-by: Ben Dooks Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220719085200.203688-1-ben.dooks@sifive.com --- drivers/reset/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index f9a7cee01659..5525714dd928 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -202,6 +202,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC + depends on HAS_IOMEM help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, -- cgit v1.2.3 From b3cbbb58632fa6f9cebf3f5c3ba210f11a3bdeb8 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 25 Jul 2022 15:03:07 -0500 Subject: ARM: dts: add EMAC AXI settings for Cyclone5 Add the dts entries needed to support the EMAC AXI bus settings on the Cyclone5. Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index bfaef45bdd04..2459f3cd7dd9 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -561,6 +561,12 @@ interrupts = <0 175 4>; }; + socfpga_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <0 0 0 0 16 0 0>; + }; + gmac0: ethernet@ff700000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; altr,sysmgr-syscon = <&sysmgr 0x60 0>; @@ -576,6 +582,7 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <4096>; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -594,6 +601,7 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <4096>; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; -- cgit v1.2.3 From 9c68d4e621ebfc166f672fa7afe14591f91d144c Mon Sep 17 00:00:00 2001 From: Biju Das Date: Sat, 23 Apr 2022 14:46:01 +0100 Subject: dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G2UL USBPHY Control bindings Add device tree binding document for RZ/G2UL USBPHY Control Device. RZ/G2UL USBPHY Control Device is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-usbphy-ctrl" will be used as a fallback. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Acked-by: Krzysztof Kozlowski Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220423134601.141975-1-biju.das.jz@bp.renesas.com --- Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml index 86c2569ced97..731b8ce01525 100644 --- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml @@ -17,6 +17,7 @@ properties: compatible: items: - enum: + - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} - renesas,r9a07g054-usbphy-ctrl # RZ/V2L - const: renesas,rzg2l-usbphy-ctrl -- cgit v1.2.3 From 729a8a57355f12d9ecba150fbef693e51b99e7ec Mon Sep 17 00:00:00 2001 From: Marco Felsch Date: Mon, 30 May 2022 11:22:25 +0200 Subject: dt-bindings: reset: Add TPS380x documentation Add device-tree binding documentation for the tps380x reset driver. The binding uses enum to make it easy to add more devices from that family. Signed-off-by: Marco Felsch Reviewed-by: Krzysztof Kozlowski Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220530092226.748644-1-m.felsch@pengutronix.de --- .../bindings/reset/ti,tps380x-reset.yaml | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml b/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml new file mode 100644 index 000000000000..afc835eda0ef --- /dev/null +++ b/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI TPS380x reset controller node bindings + +maintainers: + - Marco Felsch + +description: | + The TPS380x family [1] of supervisory circuits monitor supply voltages to + provide circuit initialization and timing supervision. The devices assert a + RESET signal if the voltage drops below a preset threshold or upon a manual + reset input (MR). The RESET output remains asserted for the factory + programmed delay after the voltage return above its threshold or after the + manual reset input is released. + + [1] https://www.ti.com/product/TPS3801 + +properties: + compatible: + enum: + - ti,tps3801 + + reset-gpios: + maxItems: 1 + description: Reference to the GPIO connected to the MR pin. + + "#reset-cells": + const: 0 + +required: + - compatible + - reset-gpios + - "#reset-cells" + +additionalProperties: false + +examples: + - | + #include + reset: reset-controller { + compatible = "ti,tps3801"; + #reset-cells = <0>; + reset-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; + }; +... -- cgit v1.2.3 From 8a4e6154fb17b691917dcf7f4b0cc1d2fb8d46c6 Mon Sep 17 00:00:00 2001 From: Marco Felsch Date: Mon, 30 May 2022 11:22:26 +0200 Subject: reset: tps380x: Add TPS380x device driver supprt The TI TPS380x family [1] is a voltage supervisor with a dedicated manual reset (mr) line input and a reset output. The chip(s) have a build in reset delay, depending on the chip partnumber. This simple driver addresses this so the cosumer don't need to care about it. [1] https://www.ti.com/product/TPS3801 Signed-off-by: Marco Felsch [p.zabel@pengutronix.de: drop Todo comment about min/typ/max reset time] Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220530092226.748644-2-m.felsch@pengutronix.de --- drivers/reset/Kconfig | 8 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-tps380x.c | 126 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 135 insertions(+) create mode 100644 drivers/reset/reset-tps380x.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5525714dd928..9b0a0263a005 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -257,6 +257,14 @@ config RESET_TI_SYSCON you wish to use the reset framework for such memory-mapped devices, say Y here. Otherwise, say N. +config RESET_TI_TPS380X + tristate "TI TPS380x Reset Driver" + select GPIOLIB + help + This enables the reset driver support for TI TPS380x devices. If + you wish to use the reset framework for such devices, say Y here. + Otherwise, say N. + config RESET_TN48M_CPLD tristate "Delta Networks TN48M switch CPLD reset controller" depends on MFD_TN48M_CPLD || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index a80a9c4008a7..66399b92b1bb 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o +obj-$(CONFIG_RESET_TI_TPS380X) += reset-tps380x.o obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o diff --git a/drivers/reset/reset-tps380x.c b/drivers/reset/reset-tps380x.c new file mode 100644 index 000000000000..e07f5865fe30 --- /dev/null +++ b/drivers/reset/reset-tps380x.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * TI TPS380x Supply Voltage Supervisor and Reset Controller Driver + * + * Copyright (C) 2022 Pengutronix, Marco Felsch + * + * Based on Simple Reset Controller Driver + * + * Copyright (C) 2017 Pengutronix, Philipp Zabel + */ + +#include +#include +#include +#include +#include +#include +#include + +struct tps380x_reset { + struct reset_controller_dev rcdev; + struct gpio_desc *reset_gpio; + unsigned int reset_ms; +}; + +struct tps380x_reset_devdata { + unsigned int min_reset_ms; + unsigned int typ_reset_ms; + unsigned int max_reset_ms; +}; + +static inline +struct tps380x_reset *to_tps380x_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct tps380x_reset, rcdev); +} + +static int +tps380x_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) +{ + struct tps380x_reset *tps380x = to_tps380x_reset(rcdev); + + gpiod_set_value_cansleep(tps380x->reset_gpio, 1); + + return 0; +} + +static int +tps380x_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +{ + struct tps380x_reset *tps380x = to_tps380x_reset(rcdev); + + gpiod_set_value_cansleep(tps380x->reset_gpio, 0); + msleep(tps380x->reset_ms); + + return 0; +} + +static const struct reset_control_ops reset_tps380x_ops = { + .assert = tps380x_reset_assert, + .deassert = tps380x_reset_deassert, +}; + +static int tps380x_reset_of_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + /* No special handling needed, we have only one reset line per device */ + return 0; +} + +static int tps380x_reset_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct tps380x_reset_devdata *devdata; + struct tps380x_reset *tps380x; + + devdata = device_get_match_data(dev); + if (!devdata) + return -EINVAL; + + tps380x = devm_kzalloc(dev, sizeof(*tps380x), GFP_KERNEL); + if (!tps380x) + return -ENOMEM; + + tps380x->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(tps380x->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(tps380x->reset_gpio), + "Failed to get GPIO\n"); + + tps380x->reset_ms = devdata->max_reset_ms; + + tps380x->rcdev.ops = &reset_tps380x_ops; + tps380x->rcdev.owner = THIS_MODULE; + tps380x->rcdev.dev = dev; + tps380x->rcdev.of_node = dev->of_node; + tps380x->rcdev.of_reset_n_cells = 0; + tps380x->rcdev.of_xlate = tps380x_reset_of_xlate; + tps380x->rcdev.nr_resets = 1; + + return devm_reset_controller_register(dev, &tps380x->rcdev); +} + +static const struct tps380x_reset_devdata tps3801_reset_data = { + .min_reset_ms = 120, + .typ_reset_ms = 200, + .max_reset_ms = 280, +}; + +static const struct of_device_id tps380x_reset_dt_ids[] = { + { .compatible = "ti,tps3801", .data = &tps3801_reset_data }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, tps380x_reset_dt_ids); + +static struct platform_driver tps380x_reset_driver = { + .probe = tps380x_reset_probe, + .driver = { + .name = "tps380x-reset", + .of_match_table = tps380x_reset_dt_ids, + }, +}; +module_platform_driver(tps380x_reset_driver); + +MODULE_AUTHOR("Marco Felsch "); +MODULE_DESCRIPTION("TI TPS380x Supply Voltags Supervisor and Reset Driver"); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From d985db83622679fc496ed824088e066528b3a872 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 28 Jul 2022 12:05:54 +0100 Subject: reset: tps380x: Fix spelling mistake "Voltags" -> "Voltage" There is a spelling mistake in the MODULE_DESCRIPTION text. Fix it. Signed-off-by: Colin Ian King Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220728110554.18320-1-colin.i.king@gmail.com --- drivers/reset/reset-tps380x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/reset-tps380x.c b/drivers/reset/reset-tps380x.c index e07f5865fe30..09d511f069ba 100644 --- a/drivers/reset/reset-tps380x.c +++ b/drivers/reset/reset-tps380x.c @@ -122,5 +122,5 @@ static struct platform_driver tps380x_reset_driver = { module_platform_driver(tps380x_reset_driver); MODULE_AUTHOR("Marco Felsch "); -MODULE_DESCRIPTION("TI TPS380x Supply Voltags Supervisor and Reset Driver"); +MODULE_DESCRIPTION("TI TPS380x Supply Voltage Supervisor and Reset Driver"); MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From 5316d73ba81b5dd7fe5ecfcd4ad494a0a68ae138 Mon Sep 17 00:00:00 2001 From: Sven Peter Date: Thu, 2 Jun 2022 19:42:13 +0200 Subject: arm64: dts: apple: t8103: Add ANS2 NVMe nodes This allows using the internal disk attached via NVMe. Signed-off-by: Sven Peter Signed-off-by: Hector Martin --- arch/arm64/boot/dts/apple/t8103.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 9f8f4145db88..51a63b29d404 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -378,6 +378,40 @@ ; }; + ans_mbox: mbox@277408000 { + compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x2 0x77408000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + power-domains = <&ps_ans2>; + }; + + sart: iommu@27bc50000 { + compatible = "apple,t8103-sart"; + reg = <0x2 0x7bc50000 0x0 0x10000>; + power-domains = <&ps_ans2>; + }; + + nvme@27bcc0000 { + compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2"; + reg = <0x2 0x7bcc0000 0x0 0x40000>, + <0x2 0x77400000 0x0 0x4000>; + reg-names = "nvme", "ans"; + interrupt-parent = <&aic>; + interrupts = ; + mboxes = <&ans_mbox>; + apple,sart = <&sart>; + power-domains = <&ps_ans2>, <&ps_apcie_st>; + power-domain-names = "ans", "apcie0"; + resets = <&ps_ans2>; + }; + pcie0_dart_0: dart@681008000 { compatible = "apple,t8103-dart"; reg = <0x6 0x81008000 0x0 0x4000>; -- cgit v1.2.3 From 9b0dc7abb5cc43a2dbf90690c3c6011dcadc574d Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 2 Aug 2022 22:36:25 +0900 Subject: ARM: dts: uniphier: Fix USB interrupts for PXs2 SoC An interrupt for USB device are shared with USB host. Set interrupt-names property to common "dwc_usb3" instead of "host" and "peripheral". Cc: stable@vger.kernel.org Fixes: 45be1573ad19 ("ARM: dts: uniphier: Add USB3 controller nodes") Reported-by: Ryuta NAKANISHI Signed-off-by: Kunihiko Hayashi Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index e81e5937a60a..03301ddb3403 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -597,8 +597,8 @@ compatible = "socionext,uniphier-dwc3", "snps,dwc3"; status = "disabled"; reg = <0x65a00000 0xcd00>; - interrupt-names = "host", "peripheral"; - interrupts = <0 134 4>, <0 135 4>; + interrupt-names = "dwc_usb3"; + interrupts = <0 134 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; clock-names = "ref", "bus_early", "suspend"; @@ -693,8 +693,8 @@ compatible = "socionext,uniphier-dwc3", "snps,dwc3"; status = "disabled"; reg = <0x65c00000 0xcd00>; - interrupt-names = "host", "peripheral"; - interrupts = <0 137 4>, <0 138 4>; + interrupt-names = "dwc_usb3"; + interrupts = <0 137 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; clock-names = "ref", "bus_early", "suspend"; -- cgit v1.2.3 From fe17b91a7777df140d0f1433991da67ba658796c Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 2 Aug 2022 22:36:47 +0900 Subject: arm64: dts: uniphier: Fix USB interrupts for PXs3 SoC An interrupt for USB device are shared with USB host. Set interrupt-names property to common "dwc_usb3" instead of "host" and "peripheral". Cc: stable@vger.kernel.org Fixes: d7b9beb830d7 ("arm64: dts: uniphier: Add USB3 controller nodes") Reported-by: Ryuta NAKANISHI Signed-off-by: Kunihiko Hayashi Signed-off-by: Arnd Bergmann --- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index be97da132258..ba75adedbf79 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -599,8 +599,8 @@ compatible = "socionext,uniphier-dwc3", "snps,dwc3"; status = "disabled"; reg = <0x65a00000 0xcd00>; - interrupt-names = "host", "peripheral"; - interrupts = <0 134 4>, <0 135 4>; + interrupt-names = "dwc_usb3"; + interrupts = <0 134 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; clock-names = "ref", "bus_early", "suspend"; @@ -701,8 +701,8 @@ compatible = "socionext,uniphier-dwc3", "snps,dwc3"; status = "disabled"; reg = <0x65c00000 0xcd00>; - interrupt-names = "host", "peripheral"; - interrupts = <0 137 4>, <0 138 4>; + interrupt-names = "dwc_usb3"; + interrupts = <0 137 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; clock-names = "ref", "bus_early", "suspend"; -- cgit v1.2.3