From fba5618451d2b3af5e55f8af5ce9c5d3677ad9c4 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 12 May 2020 15:45:43 -0500 Subject: dt-bindings: Fix incorrect 'reg' property sizes The examples template is a 'simple-bus' with a size of 1 cell for had between 2 and 4 cells which really only errors on I2C or SPI type devices with a single cell. The easiest fix in most cases is to change the 'reg' property to for 1 cell address and size. In some cases with child devices having 2 cells, that doesn't make sense so a bus node is needed. Acked-by: Stephen Boyd # clk Reviewed-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml') diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml index f17bb353f65e..81534d04094b 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml @@ -323,7 +323,7 @@ examples: tegra_pmc: pmc@7000e400 { compatible = "nvidia,tegra210-pmc"; - reg = <0x0 0x7000e400 0x0 0x400>; + reg = <0x7000e400 0x400>; clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; #clock-cells = <1>; -- cgit v1.2.3