From e16415313c9b00b1adc313e85c2c8a81febe0b98 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 20 Feb 2013 10:32:52 +0800 Subject: pinctrl: imx: move hard-coding data into device tree Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: Shawn Guo Acked-by: Dong Aisheng Acked-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt') diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt index ab19e6bc7d3b..bcfdab5d442e 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt @@ -24,9 +24,9 @@ Required properties for iomux controller: Required properties for pin configuration node: - fsl,pins: two integers array, represents a group of pins mux and config setting. The format is fsl,pins = , PIN_FUNC_ID is a - pin working on a specific function, CONFIG is the pad setting value like - pull-up on this pin. Please refer to fsl,-pinctrl.txt for the valid - pins and functions of each SoC. + pin working on a specific function, which consists of a tuple of + . CONFIG is the pad setting + value like pull-up on this pin. Bits used for CONFIG: NO_PAD_CTL(1 << 31): indicate this pin does not need config. -- cgit v1.2.3