From 4b88c673cd4aa95e49f199ea8445593e15fac854 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Mon, 6 Jul 2020 13:43:44 +0200 Subject: dt-bindings: atmel-tcb: convert bindings to json-schema Convert Atmel Timer Counter Blocks bindings to DT schema format using json-schema. Also move it out of mfd as it is not and has never been related to mfd. Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Signed-off-by: Kamel Bouhara Signed-off-by: Jonathan Cameron --- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 131 +++++++++++++++++++++ 1 file changed, 131 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml new file mode 100644 index 000000000000..9d680e0b9109 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Atmel Timer Counter Block + +maintainers: + - Alexandre Belloni + +description: | + The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each + timer has three channels with two counters each. + +properties: + compatible: + items: + - enum: + - atmel,at91rm9200-tcb + - atmel,at91sam9x5-tcb + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + interrupts: + description: + List of interrupts. One interrupt per TCB channel if available or one + interrupt for the TC block + minItems: 1 + maxItems: 3 + + clock-names: + description: + List of clock names. Always includes t0_clk and slow clk. Also includes + t1_clk and t2_clk if a clock per channel is available. + oneOf: + - items: + - const: t0_clk + - const: slow_clk + - items: + - const: t0_clk + - const: t1_clk + - const: t2_clk + - const: slow_clk + minItems: 2 + maxItems: 4 + + clocks: + minItems: 2 + maxItems: 4 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^timer@[0-2]$": + description: The timer block channels that are used as timers. + type: object + properties: + compatible: + const: atmel,tcb-timer + reg: + description: + List of channels to use for this particular timer. + minItems: 1 + maxItems: 3 + + required: + - compatible + - reg + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + /* One interrupt per TC block: */ + tcb0: timer@fff7c000 { + compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff7c000 0x100>; + interrupts = <18 4>; + clocks = <&tcb0_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + + timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>, <1>; + }; + + timer@2 { + compatible = "atmel,tcb-timer"; + reg = <2>; + }; + }; + + /* One interrupt per TC channel in a TC block: */ + tcb1: timer@fffdc000 { + compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfffdc000 0x100>; + interrupts = <26 4>, <27 4>, <28 4>; + clocks = <&tcb1_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + + timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; + }; -- cgit v1.2.3 From 3f07899fc363c99b0d1ef00d8c60a380465690b5 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Mon, 6 Jul 2020 13:43:45 +0200 Subject: dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible The sama5d2 TC block TIMER_CLOCK1 is different from the at91sam9x5 one. Instead of being MCK / 2, it is the TCB GCLK. Signed-off-by: Alexandre Belloni Signed-off-by: Kamel Bouhara Reviewed-by: Rob Herring Signed-off-by: Jonathan Cameron --- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 42 +++++++++++++++++----- 1 file changed, 33 insertions(+), 9 deletions(-) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml index 9d680e0b9109..d226fd7d5258 100644 --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -19,6 +19,7 @@ properties: - enum: - atmel,at91rm9200-tcb - atmel,at91sam9x5-tcb + - atmel,sama5d2-tcb - const: simple-mfd - const: syscon @@ -36,15 +37,6 @@ properties: description: List of clock names. Always includes t0_clk and slow clk. Also includes t1_clk and t2_clk if a clock per channel is available. - oneOf: - - items: - - const: t0_clk - - const: slow_clk - - items: - - const: t0_clk - - const: t1_clk - - const: t2_clk - - const: slow_clk minItems: 2 maxItems: 4 @@ -75,6 +67,38 @@ patternProperties: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + const: atmel,sama5d2-tcb + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: t0_clk + - const: gclk + - const: slow_clk + else: + properties: + clocks: + minItems: 2 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: t0_clk + - const: slow_clk + - items: + - const: t0_clk + - const: t1_clk + - const: t2_clk + - const: slow_clk + required: - compatible - reg -- cgit v1.2.3 From 7eb181cf06372311f58b237ce9e7434c427b56b7 Mon Sep 17 00:00:00 2001 From: Kamel Bouhara Date: Mon, 6 Jul 2020 13:43:46 +0200 Subject: dt-bindings: counter: microchip-tcb-capture counter Describe the devicetree binding for the Microchip TCB module. Each counter blocks exposes three independent counters. However, when configured in quadrature decoder, both channel <0> and <1> are required for speed/position and rotation capture (yet only the position is captured). Signed-off-by: Kamel Bouhara Reviewed-by: Rob Herring Signed-off-by: Jonathan Cameron --- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 32 ++++++++++++++++++++-- 1 file changed, 29 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml index d226fd7d5258..3cd0b70cd6cf 100644 --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -52,14 +52,20 @@ properties: patternProperties: "^timer@[0-2]$": - description: The timer block channels that are used as timers. + description: The timer block channels that are used as timers or counters. type: object properties: compatible: - const: atmel,tcb-timer + items: + - enum: + - atmel,tcb-timer + - microchip,tcb-capture reg: description: - List of channels to use for this particular timer. + List of channels to use for this particular timer. In Microchip TCB capture + mode channels are registered as a counter devices, for the qdec mode TCB0's + channel <0> and <1> are required. + minItems: 1 maxItems: 3 @@ -153,3 +159,23 @@ examples: reg = <1>; }; }; + /* TCB0 Capture with QDEC: */ + timer@f800c000 { + compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff7c000 0x100>; + interrupts = <18 4>; + clocks = <&tcb0_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + + timer@0 { + compatible = "microchip,tcb-capture"; + reg = <0>, <1>; + }; + + timer@2 { + compatible = "atmel,tcb-timer"; + reg = <2>; + }; + }; -- cgit v1.2.3