From 119fd635e383c1a58990e5805acc29f48ed3e360 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sun, 24 Mar 2013 11:49:25 +0100 Subject: clocksource: sunxi: Rename sunxi to sun4i During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Maxime Ripard --- .../devicetree/bindings/timer/allwinner,sun4i-timer.txt | 17 +++++++++++++++++ .../devicetree/bindings/timer/allwinner,sunxi-timer.txt | 17 ----------------- 2 files changed, 17 insertions(+), 17 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt delete mode 100644 Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt new file mode 100644 index 000000000000..48aeb7884ed3 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt @@ -0,0 +1,17 @@ +Allwinner A1X SoCs Timer Controller + +Required properties: + +- compatible : should be "allwinner,sun4i-timer" +- reg : Specifies base physical address and size of the registers. +- interrupts : The interrupt of the first timer +- clocks: phandle to the source clock (usually a 24 MHz fixed clock) + +Example: + +timer { + compatible = "allwinner,sun4i-timer"; + reg = <0x01c20c00 0x400>; + interrupts = <22>; + clocks = <&osc>; +}; diff --git a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt deleted file mode 100644 index 0c7b64e95a61..000000000000 --- a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt +++ /dev/null @@ -1,17 +0,0 @@ -Allwinner A1X SoCs Timer Controller - -Required properties: - -- compatible : should be "allwinner,sunxi-timer" -- reg : Specifies base physical address and size of the registers. -- interrupts : The interrupt of the first timer -- clocks: phandle to the source clock (usually a 24 MHz fixed clock) - -Example: - -timer { - compatible = "allwinner,sunxi-timer"; - reg = <0x01c20c00 0x400>; - interrupts = <22>; - clocks = <&osc>; -}; -- cgit v1.2.3