From 7efa98076b720c1f5b48c9295f79e4a9cabf7440 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Mon, 17 Jan 2022 11:07:48 +0000 Subject: dt-bindings: usb: add bindings for microchip mpfs musb Add device tree bindings for the usb controller on the Microchip PolarFire SoC. Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20220117110755.3433142-8-conor.dooley@microchip.com Reviewed-by: Rob Herring Signed-off-by: Greg Kroah-Hartman --- .../bindings/usb/microchip,mpfs-musb.yaml | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml new file mode 100644 index 000000000000..48c458c65848 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/microchip,mpfs-musb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MPFS USB Controller Device Tree Bindings + +allOf: + - $ref: usb-drd.yaml# + +maintainers: + - Conor Dooley + +properties: + compatible: + enum: + - microchip,mpfs-musb + + dr_mode: true + + reg: + maxItems: 1 + + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + items: + - const: dma + - const: mc + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +additionalProperties: false + +examples: + - | + #include "dt-bindings/clock/microchip,mpfs-clock.h" + usb@20201000 { + compatible = "microchip,mpfs-musb"; + reg = <0x20201000 0x1000>; + clocks = <&clkcfg CLK_USB>; + interrupt-parent = <&plic>; + interrupts = <86>, <87>; + interrupt-names = "dma", "mc"; + dr_mode = "host"; + }; + +... -- cgit v1.2.3 From 97ecbfb30dca36843d7a456def55e4d19007c3d2 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 27 Jan 2022 15:06:30 -0500 Subject: dt-bindings: usb: dwc3: Deprecate snps,ref-clock-period-ns This property is redundant because we can determine the correct value for REFCLKPER based on the "ref" clock. Deprecate it, and encourage users to provide a clock instead. This also restricts the minimum and maximum to the values documented in the register reference [1]. [1] https://www.xilinx.com/html_docs/registers/ug1087/usb3_xhci___guctl.html Reviewed-by: Rob Herring Signed-off-by: Sean Anderson Link: https://lore.kernel.org/r/20220127200636.1456175-2-sean.anderson@seco.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index d29ffcd27472..4f2b0913ad9f 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -263,8 +263,11 @@ properties: Value for REFCLKPER field of GUCTL register for reference clock period in nanoseconds, when the hardware set default does not match the actual clock. - minimum: 1 - maximum: 0x3ff + + This binding is deprecated. Instead, provide an appropriate reference clock. + minimum: 8 + maximum: 62 + deprecated: true snps,rx-thr-num-pkt-prd: description: -- cgit v1.2.3 From 56f26f177b26de041edef245562b68eb857093fc Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Tue, 25 Jan 2022 10:18:19 -0600 Subject: dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg" Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2 implementation, because the Agilex DWC2 implementation does not support clock gating. Acked-by: Rob Herring Signed-off-by: Dinh Nguyen Link: https://lore.kernel.org/r/20220125161821.1951906-1-dinguyen@kernel.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index f00867ebc147..481aaa09f3f2 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -53,6 +53,7 @@ properties: - const: st,stm32mp15-hsotg - const: snps,dwc2 - const: samsung,s3c6400-hsotg + - const: intel,socfpga-agilex-hsotg reg: maxItems: 1 -- cgit v1.2.3 From 8609e3e175041b00ac12c113039f3a995ea2d5b0 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Fri, 28 Jan 2022 14:28:59 +0800 Subject: dt-bindings: usb: mtk-xhci: add support ip-sleep for mt8195 There are 4 USB controllers on MT8195, each controller's wakeup control is different, add some specific versions for them. Acked-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20220128062902.26273-1-chunfeng.yun@mediatek.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 11f7bacd4e2b..41efb51638d1 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -146,7 +146,11 @@ properties: 2 - used by mt2712 etc, revision 2 following IPM rule; 101 - used by mt8183, specific 1.01; 102 - used by mt8192, specific 1.02; - enum: [1, 2, 101, 102] + 103 - used by mt8195, IP0, specific 1.03; + 104 - used by mt8195, IP1, specific 1.04; + 105 - used by mt8195, IP2, specific 1.05; + 106 - used by mt8195, IP3, specific 1.06; + enum: [1, 2, 101, 102, 103, 104, 105, 106] mediatek,u3p-dis-msk: $ref: /schemas/types.yaml#/definitions/uint32 -- cgit v1.2.3 From 3a0f60b5ea321e5071807a5c0c37656d5be810d6 Mon Sep 17 00:00:00 2001 From: ChiYuan Huang Date: Wed, 9 Feb 2022 23:42:41 +0800 Subject: dt-bindings: usb: rt1719: Add binding for Richtek RT1719 Add binding for Richtek RT1719. Reviewed-by: Rob Herring Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1644421362-32104-2-git-send-email-u0084500@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/richtek,rt1719.yaml | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/richtek,rt1719.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml b/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml new file mode 100644 index 000000000000..65a93f7738d5 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/richtek,rt1719.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Richtek RT1719 sink-only Type-C PD controller bindings + +maintainers: + - ChiYuan Huang + +description: | + The RT1719 is a sink-only USB Type-C contoller that complies with the latest + USB Type-C and PD standards. It does the USB Type-C detection including attach + and orientation. It integrates the physical layer of the USB BMC power + delivery protocol to allow up to 100W of power. The BMC PD block enables full + support for alternative interfaces of the Type-C specification. + +properties: + compatible: + enum: + - richtek,rt1719 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + wakeup-source: + description: enable IRQ remote wakeup, see power/wakeup-source.txt + type: boolean + + connector: + type: object + $ref: ../connector/usb-connector.yaml# + description: + Properties for usb c connector. + +additionalProperties: false + +required: + - compatible + - reg + - connector + - interrupts + +examples: + - | + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + rt1719@43 { + compatible = "richtek,rt1719"; + reg = <0x43>; + interrupts-extended = <&gpio26 2 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&usb_hs>; + }; + }; + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&usb_ss>; + }; + }; + }; + }; + }; + }; +... -- cgit v1.2.3 From 334daddbe6553b7cd73027154282242225ff984d Mon Sep 17 00:00:00 2001 From: Souradeep Chowdhury Date: Tue, 8 Feb 2022 23:24:24 +0530 Subject: dt-bindings: Add the yaml bindings for EUD Documentation for Embedded USB Debugger(EUD) device tree bindings in yaml format. Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring Signed-off-by: Souradeep Chowdhury Link: https://lore.kernel.org/r/e6a490c5eab9750decd5204d284b9b163b9be187.1644339918.git.quic_schowdhu@quicinc.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/soc/qcom/qcom,eud.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml new file mode 100644 index 000000000000..c98aab209bc5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/qcom,eud.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Embedded USB Debugger + +maintainers: + - Souradeep Chowdhury + +description: + This binding is used to describe the Qualcomm Embedded USB Debugger, which is + mini USB-hub implemented on chip to support USB-based debug capabilities. + +properties: + compatible: + items: + - enum: + - qcom,sc7280-eud + - const: qcom,eud + + reg: + items: + - description: EUD Base Register Region + - description: EUD Mode Manager Register + + interrupts: + description: EUD interrupt + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + These ports is to be attached to the endpoint of the DWC3 controller node + and type C connector node. The controller has the "usb-role-switch" + property. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the DWC3 controller. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the type C connector. + +required: + - compatible + - reg + - ports + +additionalProperties: false + +examples: + - | + eud@88e0000 { + compatible = "qcom,sc7280-eud","qcom,eud"; + reg = <0x88e0000 0x2000>, + <0x88e2000 0x1000>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + eud_ep: endpoint { + remote-endpoint = <&usb2_role_switch>; + }; + }; + port@1 { + reg = <1>; + eud_con: endpoint { + remote-endpoint = <&con_eud>; + }; + }; + }; + }; -- cgit v1.2.3 From 306a20df822d5a6522aa4aa2029a858ed5fbd517 Mon Sep 17 00:00:00 2001 From: Souradeep Chowdhury Date: Tue, 8 Feb 2022 23:24:25 +0530 Subject: bindings: usb: dwc3: Update dwc3 properties for EUD connector Add the ports property for dwc3 node. This port can be used by the Embedded USB Debugger for role switching the controller from device to host mode and vice versa. Reviewed-by: Rob Herring Signed-off-by: Souradeep Chowdhury Link: https://lore.kernel.org/r/7308170ce13a96c2ff9cbb22316f46c814c42ef1.1644339918.git.quic_schowdhu@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 4f2b0913ad9f..f4471f8bdbef 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -335,6 +335,12 @@ properties: items: enum: [1, 4, 8, 16, 32, 64, 128, 256] + port: + $ref: /schemas/graph.yaml#/properties/port + description: + This port is used with the 'usb-role-switch' property to connect the + dwc3 to type C connector. + unevaluatedProperties: false required: -- cgit v1.2.3 From 3fa891093bd1f2b6d89e5bedabe81cc7503d392f Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Feb 2022 23:01:14 -0600 Subject: dt-bindings: vendor-prefixes: Add willsemi Add prefix for Will Semiconductor Co. Ltd. (http://www.willsemi.com/) Acked-by: Rob Herring Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20220214050118.61015-2-samuel@sholland.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 294093d45a23..a8ab97717a46 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1340,6 +1340,8 @@ patternProperties: description: Wi2Wi, Inc. "^wiligear,.*": description: Wiligear, Ltd. + "^willsemi,.*": + description: Will Semiconductor Ltd. "^winbond,.*": description: Winbond Electronics corp. "^wingtech,.*": -- cgit v1.2.3 From 71c16066a53f6ac7e925476070c4dbecfbeceee0 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Feb 2022 23:01:15 -0600 Subject: dt-bindings: usb: Add WUSB3801 Type-C Port Controller Add devicetree support for the Will Semiconductor WUSB3801. This is a basic non-PD Type-C port controller. Reviewed-by: Rob Herring Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20220214050118.61015-3-samuel@sholland.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/willsemi,wusb3801.yaml | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml b/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml new file mode 100644 index 000000000000..c2b2243c7892 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/willsemi,wusb3801.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: WUSB3801 Type-C port controller DT bindings + +description: + The Will Semiconductor WUSB3801 is a USB Type-C port controller which + supports role and plug orientation detection using the CC pins. It is + compatible with the USB Type-C Cable and Connector Specification v1.2. + +maintainers: + - Samuel Holland + +properties: + compatible: + enum: + - willsemi,wusb3801 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + connector: + type: object + $ref: ../connector/usb-connector.yaml# + description: + The managed USB Type-C connector. Since WUSB3801 does not support + Power Delivery, the node should have the "pd-disable" property. + + properties: + compatible: + const: usb-c-connector + + required: + - pd-disable + +required: + - compatible + - reg + - interrupts + - connector + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + tcpc@60 { + compatible = "willsemi,wusb3801"; + reg = <0x60>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + vbus-supply = <&otg_switch>; + power-role = "dual"; + try-power-role = "sink"; + data-role = "dual"; + typec-power-opmode = "default"; + pd-disable; + }; + }; + }; -- cgit v1.2.3 From bc25c55812ff72cd3f2c310ba42f78a812dac95e Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 20 Feb 2022 21:18:56 +0100 Subject: dt-bindings: usb: qcom,dwc3: Add msm8953 compatible Document the compatible string for the DWC3 controller in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220220201909.445468-4-luca@z3ntu.xyz Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 2d23a4ff702f..ce252db2aab3 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -16,6 +16,7 @@ properties: - qcom,ipq4019-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 + - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 - qcom,sc7180-dwc3 -- cgit v1.2.3 From 949ea75b7ba4a8ea883b9d1a2bd0d391ffd86a80 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Mar 2022 20:09:37 +0100 Subject: dt-bindings: usb: samsung,exynos-dwc3: convert to dtschema Convert the Samsung Exynos SoC USB 3.0 DWC3 Controller bindings to DT schema format. Reviewed-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220302190938.6195-2-krzysztof.kozlowski@canonical.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/exynos-usb.txt | 49 -------- .../bindings/usb/samsung,exynos-dwc3.yaml | 129 +++++++++++++++++++++ 2 files changed, 129 insertions(+), 49 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt index f7ae79825d7d..61c03c0ef19f 100644 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt @@ -64,52 +64,3 @@ Example: phys = <&usb2phy 1>; phy-names = "host"; }; - -DWC3 -Required properties: - - compatible: should be one of the following - - "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on - Exynos5250/5420. - "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on - Exynos5433. - "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7. - - #address-cells, #size-cells : should be '1' if the device has sub-nodes - with 'reg' property. - - ranges: allows valid 1:1 translation between child's address space and - parent's address space - - clocks: Clock IDs array as required by the controller. - - clock-names: Names of clocks corresponding to IDs in the clock property. - Following clock names shall be provided for different - compatibles: - - samsung,exynos5250-dwusb3: "usbdrd30", - - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk", - "phyclk", - - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk", - "usbdrd30_axius_clk" - - vdd10-supply: 1.0V powr supply - - vdd33-supply: 3.0V/3.3V power supply - -Sub-nodes: -The dwc3 core should be added as subnode to Exynos dwc3 glue. -- dwc3 : - The binding details of dwc3 can be found in: - Documentation/devicetree/bindings/usb/snps,dwc3.yaml - -Example: - usb@12000000 { - compatible = "samsung,exynos5250-dwusb3"; - clocks = <&clock 286>; - clock-names = "usbdrd30"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - vdd10-supply = <&ldo11_reg>; - vdd33-supply = <&ldo9_reg>; - - dwc3 { - compatible = "synopsys,dwc3"; - reg = <0x12000000 0x10000>; - interrupts = <0 72 0>; - usb-phy = <&usb2_phy &usb3_phy>; - }; - }; diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml new file mode 100644 index 000000000000..22b91a27d776 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC USB 3.0 DWC3 Controller + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + enum: + - samsung,exynos5250-dwusb3 + - samsung,exynos5433-dwusb3 + - samsung,exynos7-dwusb3 + + '#address-cells': + const: 1 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + + ranges: true + + '#size-cells': + const: 1 + + vdd10-supply: + description: 1.0V power supply + + vdd33-supply: + description: 3.0V/3.3V power supply + +patternProperties: + "^usb@[0-9a-f]+$": + $ref: snps,dwc3.yaml# + description: Required child node + +required: + - compatible + - '#address-cells' + - clocks + - clock-names + - ranges + - '#size-cells' + - vdd10-supply + - vdd33-supply + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos5250-dwusb3 + then: + properties: + clocks: + minItems: 1 + maxItems: 1 + clock-names: + items: + - const: usbdrd30 + + - if: + properties: + compatible: + contains: + const: samsung,exynos54333-dwusb3 + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: aclk + - const: susp_clk + - const: pipe_pclk + - const: phyclk + + - if: + properties: + compatible: + contains: + const: samsung,exynos7-dwusb3 + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: usbdrd30 + - const: usbdrd30_susp_clk + - const: usbdrd30_axius_clk + +additionalProperties: false + +examples: + - | + #include + #include + + usb { + compatible = "samsung,exynos5250-dwusb3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&clock CLK_USBD300>; + clock-names = "usbdrd30"; + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; + + usb@12000000 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = ; + phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; + phy-names = "usb2-phy", "usb3-phy"; + snps,dis_u3_susphy_quirk; + }; + }; -- cgit v1.2.3 From 4bf2283cb2084aa44ba79d30ca8e0e886ac98f8a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Mar 2022 20:09:38 +0100 Subject: dt-bindings: usb: samsung,exynos-usb2: convert to dtschema Convert the Samsung Exynos SoC USB 2.0 EHCI and OHCI Controller bindings to DT schema format. Reviewed-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220302190938.6195-3-krzysztof.kozlowski@canonical.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/exynos-usb.txt | 66 ------------ .../bindings/usb/samsung,exynos-usb2.yaml | 117 +++++++++++++++++++++ 2 files changed, 117 insertions(+), 66 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/exynos-usb.txt create mode 100644 Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt deleted file mode 100644 index 61c03c0ef19f..000000000000 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ /dev/null @@ -1,66 +0,0 @@ -Samsung Exynos SoC USB controller - -The USB devices interface with USB controllers on Exynos SOCs. -The device node has following properties. - -EHCI -Required properties: - - compatible: should be "samsung,exynos4210-ehci" for USB 2.0 - EHCI controller in host mode. - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: interrupt number to the cpu. - - clocks: from common clock binding: handle to usb clock. - - clock-names: from common clock binding: Shall be "usbhost". - - phys: from the *Generic PHY* bindings; array specifying phy(s) used - by the root port. - - phy-names: from the *Generic PHY* bindings; array of the names for - each phy for the root ports, must be a subset of the following: - "host", "hsic0", "hsic1". - -Optional properties: - - samsung,vbus-gpio: if present, specifies the GPIO that - needs to be pulled up for the bus to be powered. - -Example: - - usb@12110000 { - compatible = "samsung,exynos4210-ehci"; - reg = <0x12110000 0x100>; - interrupts = <0 71 0>; - samsung,vbus-gpio = <&gpx2 6 1 3 3>; - - clocks = <&clock 285>; - clock-names = "usbhost"; - - phys = <&usb2phy 1>; - phy-names = "host"; - }; - -OHCI -Required properties: - - compatible: should be "samsung,exynos4210-ohci" for USB 2.0 - OHCI companion controller in host mode. - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: interrupt number to the cpu. - - clocks: from common clock binding: handle to usb clock. - - clock-names: from common clock binding: Shall be "usbhost". - - phys: from the *Generic PHY* bindings; array specifying phy(s) used - by the root port. - - phy-names: from the *Generic PHY* bindings; array of the names for - each phy for the root ports, must be a subset of the following: - "host", "hsic0", "hsic1". - -Example: - usb@12120000 { - compatible = "samsung,exynos4210-ohci"; - reg = <0x12120000 0x100>; - interrupts = <0 71 0>; - - clocks = <&clock 285>; - clock-names = "usbhost"; - - phys = <&usb2phy 1>; - phy-names = "host"; - }; diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml new file mode 100644 index 000000000000..fbf07d6e707a --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + enum: + - samsung,exynos4210-ehci + - samsung,exynos4210-ohci + + '#address-cells': + const: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: usbhost + + interrupts: + maxItems: 1 + + phys: + minItems: 1 + maxItems: 3 + + phy-names: + items: + enum: [host, hsic0, hsic1] + minItems: 1 + maxItems: 3 + + reg: + maxItems: 1 + + samsung,vbus-gpio: + description: + Only for controller in EHCI mode, if present, specifies the GPIO that + needs to be pulled up for the bus to be powered. + + '#size-cells': + const: 0 + +patternProperties: + "^.*@[0-9a-f]{1,2}$": + description: The hard wired USB devices + type: object + $ref: /usb/usb-device.yaml + +required: + - compatible + - clocks + - clock-names + - interrupts + - phys + - phy-names + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos4210-ohci + then: + properties: + samsung,vbus-gpio: false + +additionalProperties: false + +examples: + - | + #include + #include + + usb@12110000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0x12110000 0x100>; + interrupts = ; + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; + phys = <&usb2_phy 0>; + phy-names = "host"; + + #address-cells = <1>; + #size-cells = <0>; + + hub@1 { + compatible = "usb0424,9514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + usbether@1 { + compatible = "usb0424,ec00"; + reg = <1>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; + + usb@12120000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0x12120000 0x100>; + interrupts = ; + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; + phys = <&usb2_phy 0>; + phy-names = "host"; + }; -- cgit v1.2.3 From 801109b1a37ad99784e6370cc7e462596f505ea3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 14 Mar 2022 19:18:30 +0100 Subject: dt-bindings: usb: hcd: correct usb-device path The usb-device.yaml reference is absolute so it should use /schemas part in path. Fixes: 23bf6fc7046c ("dt-bindings: usb: convert usb-device.txt to YAML schema") Cc: Reported-by: Rob Herring Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220314181830.245853-1-krzysztof.kozlowski@canonical.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/usb-hcd.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml b/Documentation/devicetree/bindings/usb/usb-hcd.yaml index 56853c17af66..1dc3d5d7b44f 100644 --- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml +++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml @@ -33,7 +33,7 @@ patternProperties: "^.*@[0-9a-f]{1,2}$": description: The hard wired USB devices type: object - $ref: /usb/usb-device.yaml + $ref: /schemas/usb/usb-device.yaml additionalProperties: true -- cgit v1.2.3 From d600d31e37dc50c4a99f3e73f8b467ea33f1475f Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Fri, 18 Feb 2022 16:27:05 +0100 Subject: dt-bindings: usb: dwc3-imx8mp: Add imx8mp specific flags This adds bindings for features in the USB glue block. They allow setting polarity of PWR and OC as well as disabling port power control. Also permanently attached can be annotated as well. Additional IO address and clock are needed. Reviewed-by: Rob Herring Signed-off-by: Alexander Stein Link: https://lore.kernel.org/r/20220218152707.2198357-3-alexander.stein@ew.tq-group.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml | 31 +++++++++++++++++++--- 1 file changed, 27 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml index 974032b1fda0..01ab0f922ae8 100644 --- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml @@ -15,9 +15,9 @@ properties: const: fsl,imx8mp-dwc3 reg: - maxItems: 1 - description: Address and length of the register set for the wrapper of - dwc3 core on the SOC. + items: + - description: Address and length of the register set for HSIO Block Control + - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. "#address-cells": enum: [ 1, 2 ] @@ -49,6 +49,28 @@ properties: - const: hsio - const: suspend + fsl,permanently-attached: + type: boolean + description: + Indicates if the device atached to a downstream port is + permanently attached. + + fsl,disable-port-power-control: + type: boolean + description: + Indicates whether the host controller implementation includes port + power control. Defines Bit 3 in capability register (HCCPARAMS). + + fsl,over-current-active-low: + type: boolean + description: + Over current signal polarity is active low. + + fsl,power-active-low: + type: boolean + description: + Power pad (PWR) polarity is active low. + # Required child node: patternProperties: @@ -74,7 +96,8 @@ examples: #include usb3_0: usb@32f10100 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10100 0x8>; + reg = <0x32f10100 0x8>, + <0x381f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend"; -- cgit v1.2.3 From 62a13a9c0046b2224af6aa6e39c54f89a06245d4 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Mon, 28 Feb 2022 08:56:54 -0500 Subject: dt-bindings: usb: add rk3568 compatible to rockchip, dwc3 Add the compatible for the Rockchip RK3568 variant. Tested-by: Michael Riesch Signed-off-by: Michael Riesch Link: https://lore.kernel.org/r/20220228135700.1089526-4-pgwipeout@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index 04077f2d7faf..b3798d94d2fd 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -30,6 +30,7 @@ select: enum: - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 + - rockchip,rk3568-dwc3 required: - compatible @@ -39,6 +40,7 @@ properties: - enum: - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 + - rockchip,rk3568-dwc3 - const: snps,dwc3 reg: -- cgit v1.2.3 From ac484005767bb50cc76e56e26fdbb25a097e5bf8 Mon Sep 17 00:00:00 2001 From: Allen-KH Cheng Date: Wed, 16 Feb 2022 20:00:25 +0800 Subject: dt-bindings: usb: mtk-xhci: add compatible for mt8186 Add compatible for mt8186 Acked-by: Rob Herring Acked-by: Chunfeng Yun Signed-off-by: Allen-KH Cheng Link: https://lore.kernel.org/r/20220216120025.29860-1-allen-kh.cheng@mediatek.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 41efb51638d1..084d7135b2d9 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -30,6 +30,7 @@ properties: - mediatek,mt7629-xhci - mediatek,mt8173-xhci - mediatek,mt8183-xhci + - mediatek,mt8186-xhci - mediatek,mt8192-xhci - mediatek,mt8195-xhci - const: mediatek,mtk-xhci -- cgit v1.2.3