From 64c05eb3a0f4d80e3e4deea5afa4ce6f48f5894c Mon Sep 17 00:00:00 2001 From: Vijaya Krishna Nivarthi Date: Mon, 24 Apr 2023 15:02:37 +0530 Subject: spi: dt-bindings: qcom,spi-qcom-qspi: Add iommus Add iommus binding for DMA mode support Signed-off-by: Vijaya Krishna Nivarthi Date: Wed, 3 May 2023 10:20:36 +0200 Subject: dt-bindings: spi: zynqmp-qspi: Add power-domains and iommus properties ZynqMP QSPI IP core has own power domain and also iommu ID that's why describe optional power-domains and iommus properties. Signed-off-by: Michal Simek Date: Wed, 10 May 2023 11:11:08 +0300 Subject: spi: sun6i: add DT bindings for Allwinner R329/D1/R528/T113s SPI Listed above Allwinner SoCs has two SPI controllers. First is the regular SPI controller and the second one has additional functionality for MIPI-DBI Type C. Add compatible strings for these controllers Signed-off-by: Maksim Kiselev Date: Mon, 15 May 2023 11:16:00 -0700 Subject: spi: cdns: Add compatible for AMD Pensando Elba SoC Document the cadence qspi controller compatible for AMD Pensando Elba SoC boards. The Elba qspi fifo size is 1024. Signed-off-by: Brad Larson Date: Tue, 30 May 2023 16:48:49 +0200 Subject: spi: dt-bindings: restrict node name suffixes Make the pattern matching node names a bit stricter to improve DTS consistency. The pattern is restricted to: 1. Only one unit address or one -N suffix, 2. -N suffixes to decimal numbers. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230530144851.92059-6-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 90945f59b7e8..524f6fe8c27b 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -17,7 +17,7 @@ description: | properties: $nodename: - pattern: "^spi(@.*|-[0-9a-f])*$" + pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$" "#address-cells": enum: [0, 1] -- cgit v1.2.3 From c092a878729843c10160c6f22864507ab7dbceb2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 Jun 2023 11:59:06 +0200 Subject: spi: dt-bindings: allwinner: simplify with unevaluatedProperties Remove properties already mentioned by common spi-controller.yaml and switch to unevaluatedProperties:false to achieve same functional effect. This makes the binding a bit smaller. Similarly there is no need to allow additionalProperties for children, because spi-controller.yaml already does it. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230601095908.563865-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml | 8 +------- .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml | 8 +------- 2 files changed, 2 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml index 2155478bfc4d..a6f34bdd1d3c 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml @@ -14,9 +14,6 @@ maintainers: - Maxime Ripard properties: - "#address-cells": true - "#size-cells": true - compatible: const: allwinner,sun4i-a10-spi @@ -46,12 +43,9 @@ properties: - const: rx - const: tx - num-cs: true - patternProperties: "^.*@[0-9a-f]+": type: object - additionalProperties: true properties: reg: items: @@ -71,7 +65,7 @@ required: - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index fa5260eca531..28b8ace63044 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -14,9 +14,6 @@ maintainers: - Maxime Ripard properties: - "#address-cells": true - "#size-cells": true - compatible: oneOf: - const: allwinner,sun50i-r329-spi @@ -68,12 +65,9 @@ properties: - const: rx - const: tx - num-cs: true - patternProperties: "^.*@[0-9a-f]+": type: object - additionalProperties: true properties: reg: items: @@ -93,7 +87,7 @@ required: - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From bbd25f1ae8bfaeb99de2a0e1985d206cd39ac014 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 Jun 2023 11:59:07 +0200 Subject: spi: dt-bindings: samsung: drop cs-gpios Remove cs-gpios because it is already mentioned by common spi-controller.yaml. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230601095908.563865-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/samsung,spi.yaml | 2 -- 1 file changed, 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Documentation/devicetree/bindings/spi/samsung,spi.yaml index e0a465d70b0a..79da99ca0e53 100644 --- a/Documentation/devicetree/bindings/spi/samsung,spi.yaml +++ b/Documentation/devicetree/bindings/spi/samsung,spi.yaml @@ -35,8 +35,6 @@ properties: minItems: 2 maxItems: 3 - cs-gpios: true - dmas: minItems: 2 maxItems: 2 -- cgit v1.2.3 From 34fcc0f0a410ff67aba99875d0452a0762d5a98d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 Jun 2023 11:59:08 +0200 Subject: spi: dt-bindings: socionext,uniphier: drop address/size-cells Remove address/size-cells because they are already mentioned by common spi-controller.yaml. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230601095908.563865-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml b/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml index 597fc4e6b01c..c96131ebbea1 100644 --- a/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml +++ b/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml @@ -17,9 +17,6 @@ allOf: - $ref: spi-controller.yaml# properties: - "#address-cells": true - "#size-cells": true - compatible: const: socionext,uniphier-scssi -- cgit v1.2.3 From 7bac98a338d63efb0b44ce4b79d53838491f00df Mon Sep 17 00:00:00 2001 From: Abe Kohandel Date: Tue, 6 Jun 2023 07:54:02 -0700 Subject: spi: dt-bindings: snps,dw-apb-ssi: Add compatible for Intel Mount Evans SoC Document the DesignWare SSI controller compatible for Intel Mount Evans Integrated Management Complex SoC. Signed-off-by: Abe Kohandel Link: https://lore.kernel.org/r/20230606145402.474866-3-abe.kohandel@intel.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 12ca108864c6..a47cb144b09f 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -74,6 +74,8 @@ properties: const: intel,keembay-ssi - description: Intel Thunder Bay SPI Controller const: intel,thunderbay-ssi + - description: Intel Mount Evans Integrated Management Complex SPI Controller + const: intel,mountevans-imc-ssi - description: AMD Pensando Elba SoC SPI Controller const: amd,pensando-elba-spi - description: Baikal-T1 SPI Controller -- cgit v1.2.3 From e6afe03351ac81fbc4f2b93bf3b356f7b662939d Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Thu, 15 Jun 2023 09:58:14 +0200 Subject: spi: stm32: disable spi-slave property for stm32f4-f7 STM32F4 and STM32F7 can't switch to spi device mode. Forbid this property with compatible "st,stm32f4-spi". Signed-off-by: Alain Volmat Signed-off-by: Valentin Caron Link: https://lore.kernel.org/r/20230615075815.310261-4-valentin.caron@foss.st.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/st,stm32-spi.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index 9ca1a843c820..f1c86e694af1 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -27,6 +27,7 @@ allOf: then: properties: st,spi-midi-ns: false + spi-slave: false properties: compatible: -- cgit v1.2.3 From 01fa9edd8bcf1c4fe330ea000c3da9ecf76c76a0 Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Wed, 21 Jun 2023 13:55:23 +0200 Subject: spi: dt-bindings: stm32: do not disable spi-slave property for stm32f4-f7 STM32F4-F7 are, from hardware point of view, capable to handle device mode. So this property should not be forced at false in dt-bindings. Signed-off-by: Valentin Caron Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/Message-Id: <20230621115523.923176-3-valentin.caron@foss.st.com> Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/st,stm32-spi.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index f1c86e694af1..9ca1a843c820 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -27,7 +27,6 @@ allOf: then: properties: st,spi-midi-ns: false - spi-slave: false properties: compatible: -- cgit v1.2.3 From 14dde0746e67588524d8dd464ac5e4afd3478bb3 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Thu, 22 Jun 2023 12:33:37 +0100 Subject: spi: dt-bindings: Add bindings for RZ/V2M CSI Add dt-bindings for the CSI IP found inside the RZ/V2M SoC. Signed-off-by: Fabrizio Castro Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-2-fabrizio.castro.jz@renesas.com> Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/renesas,rzv2m-csi.yaml | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml new file mode 100644 index 000000000000..e59183e53690 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/renesas,rzv2m-csi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M Clocked Serial Interface (CSI) + +maintainers: + - Fabrizio Castro + - Geert Uytterhoeven + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: renesas,rzv2m-csi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The clock used to generate the output clock (CSICLK) + - description: Internal clock to access the registers (PCLK) + + clock-names: + items: + - const: csiclk + - const: pclk + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - power-domains + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + #include + #include + csi4: spi@a4020200 { + compatible = "renesas,rzv2m-csi"; + reg = <0xa4020200 0x80>; + interrupts = ; + clocks = <&cpg CPG_MOD R9A09G011_CSI4_CLK>, + <&cpg CPG_MOD R9A09G011_CPERI_GRPH_PCLK>; + clock-names = "csiclk", "pclk"; + resets = <&cpg R9A09G011_CSI_GPH_PRESETN>; + power-domains = <&cpg>; + #address-cells = <1>; + #size-cells = <0>; + }; -- cgit v1.2.3 From a3eb95484f276488e3d59cffa8eec29f79be416e Mon Sep 17 00:00:00 2001 From: Varshini Rajendran Date: Sat, 24 Jun 2023 02:00:43 +0530 Subject: spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible Add sam9x7 compatible to DT bindings documentation. Signed-off-by: Varshini Rajendran Link: https://lore.kernel.org/r/Message-Id: <20230623203056.689705-33-varshini.rajendran@microchip.com> Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml index 6c57dd6c3a36..bdc42eeacba4 100644 --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml @@ -19,6 +19,7 @@ properties: - const: atmel,at91rm9200-spi - items: - const: microchip,sam9x60-spi + - const: microchip,sam9x7-spi - const: atmel,at91rm9200-spi reg: -- cgit v1.2.3 From e884a133340a470070b2c59833c9ff87aa6517ba Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 24 Jun 2023 10:20:54 +0200 Subject: spi: dt-bindings: atmel,at91rm9200-spi: fix broken sam9x7 compatible Commit a3eb95484f27 ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible") adding sam9x7 compatible did not make any sense as it added new compatible into middle of existing compatible list. The intention was probably to add new set of compatibles with sam9x7 as first one. Fixes: a3eb95484f27 ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible") Signed-off-by: Krzysztof Kozlowski Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/Message-Id: <20230624082054.37697-1-krzysztof.kozlowski@linaro.org> Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml index bdc42eeacba4..58367587bfbc 100644 --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml @@ -19,7 +19,10 @@ properties: - const: atmel,at91rm9200-spi - items: - const: microchip,sam9x60-spi + - const: atmel,at91rm9200-spi + - items: - const: microchip,sam9x7-spi + - const: microchip,sam9x60-spi - const: atmel,at91rm9200-spi reg: -- cgit v1.2.3