From 8848c0d7a0782c263a7827697d5acfcc09a19a5f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 2 Dec 2022 17:23:49 +0100 Subject: dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with calibration values from OCOTP. Document optional phandle to OCOTP nvmem provider. Acked-by: Krzysztof Kozlowski Signed-off-by: Marek Vasut Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml index 89c54e08ee61..b90726229ac9 100644 --- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml @@ -32,6 +32,13 @@ properties: clocks: maxItems: 1 + nvmem-cells: + maxItems: 1 + description: Phandle to the calibration data provided by ocotp + + nvmem-cell-names: + const: calib + "#thermal-sensor-cells": description: | Number of cells required to uniquely identify the thermal -- cgit v1.2.3