From 616bc1dea1ac8909dfcd6d32802df6fe50eddde8 Mon Sep 17 00:00:00 2001 From: Xingyu Wu Date: Mon, 17 Jul 2023 10:30:37 +0800 Subject: clk: starfive: Add StarFive JH7110 PLL clock driver Add driver for the StarFive JH7110 PLL clock controller and they work by reading and setting syscon registers. Co-developed-by: Emil Renner Berthing Signed-off-by: Emil Renner Berthing Signed-off-by: Xingyu Wu Signed-off-by: Conor Dooley --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 41515204c087..feb796d63865 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20271,6 +20271,12 @@ S: Supported F: Documentation/devicetree/bindings/mmc/starfive* F: drivers/mmc/host/dw_mmc-starfive.c +STARFIVE JH7110 PLL CLOCK DRIVER +M: Xingyu Wu +S: Supported +F: Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml +F: drivers/clk/starfive/clk-starfive-jh7110-pll.c + STARFIVE JH7110 SYSCON M: William Qiu M: Xingyu Wu -- cgit v1.2.3