From f373cffbdc46f287dd01bb7c4cfbf0b8c9a52d4e Mon Sep 17 00:00:00 2001 From: Renze Nicolai Date: Sat, 2 Dec 2023 01:38:45 +0100 Subject: ARM: dts: aspeed: asrock: Add ASRock X570D4U BMC This is a relatively low-cost AST2500-based Amd Ryzen 5000 Series micro-ATX board that we hope can provide a decent platform for OpenBMC development. This initial device-tree provides the necessary configuration for basic BMC functionality such as serial console, KVM support and POST code snooping. Signed-off-by: Renze Nicolai Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231202003908.3635695-3-renze@rnplus.nl Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 377 +++++++++++++++++++++ 1 file changed, 377 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts new file mode 100644 index 000000000000..3c975bc41ae7 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; +#include "aspeed-g5.dtsi" +#include +#include + +/ { + model = "Asrock Rack X570D4U BMC"; + compatible = "asrock,x570d4u-bmc", "aspeed,ast2500"; + + aliases { + i2c40 = &i2c4mux0ch0; + i2c41 = &i2c4mux0ch1; + i2c42 = &i2c4mux0ch2; + i2c43 = &i2c4mux0ch3; + }; + + chosen { + stdout-path = &uart5; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pci_memory: region@9a000000 { + no-map; + reg = <0x9a000000 0x00010000>; /* 64K */ + }; + + video_engine_memory: jpegbuffer { + size = <0x02800000>; /* 40M */ + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + + gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + /* led-heartbeat-n */ + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_HEARTBEAT; + linux,default-trigger = "timer"; + }; + + led-1 { + /* led-fault-n */ + gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_FAULT; + panic-indicator; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, + <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>, + <&adc 10>, <&adc 11>, <&adc 12>; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = + /*A0-A3*/ "status-locatorled-n", "", "button-nmi-n", "", + /*A4-A7*/ "", "", "", "", + /*B0-B3*/ "input-bios-post-cmplt-n", "", "", "", + /*B4-B7*/ "", "", "", "", + /*C0-C3*/ "", "", "", "", + /*C4-C7*/ "", "", "control-locatorbutton", "", + /*D0-D3*/ "button-power", "control-power", "button-reset", "control-reset", + /*D4-D7*/ "", "", "", "", + /*E0-E3*/ "", "", "", "", + /*E4-E7*/ "", "", "", "", + /*F0-F3*/ "", "", "", "", + /*F4-F7*/ "", "", "", "", + /*G0-G3*/ "output-rtc-battery-voltage-read-enable", "input-id0", "input-id1", "input-id2", + /*G4-G7*/ "input-alert1-n", "input-alert2-n", "input-alert3-n", "", + /*H0-H3*/ "", "", "", "", + /*H4-H7*/ "input-mfg", "", "led-heartbeat-n", "input-caseopen", + /*I0-I3*/ "", "", "", "", + /*I4-I7*/ "", "", "", "", + /*J0-J3*/ "output-bmc-ready", "", "", "", + /*J4-J7*/ "", "", "", "", + /*K0-K3*/ "", "", "", "", + /*K4-K7*/ "", "", "", "", + /*L0-L3*/ "", "", "", "", + /*L4-L7*/ "", "", "", "", + /*M0-M3*/ "", "", "", "", + /*M4-M7*/ "", "", "", "", + /*N0-N3*/ "", "", "", "", + /*N4-N7*/ "", "", "", "", + /*O0-O3*/ "", "", "", "", + /*O4-O7*/ "", "", "", "", + /*P0-P3*/ "", "", "", "", + /*P4-P7*/ "", "", "", "", + /*Q0-Q3*/ "", "", "", "", + /*Q4-Q7*/ "", "", "", "", + /*R0-R3*/ "", "", "", "", + /*R4-R7*/ "", "", "", "", + /*S0-S3*/ "input-bmc-pchhot-n", "", "", "", + /*S4-S7*/ "", "", "", "", + /*T0-T3*/ "", "", "", "", + /*T4-T7*/ "", "", "", "", + /*U0-U3*/ "", "", "", "", + /*U4-U7*/ "", "", "", "", + /*V0-V3*/ "", "", "", "", + /*V4-V7*/ "", "", "", "", + /*W0-W3*/ "", "", "", "", + /*W4-W7*/ "", "", "", "", + /*X0-X3*/ "", "", "", "", + /*X4-X7*/ "", "", "", "", + /*Y0-Y3*/ "", "", "", "", + /*Y4-Y7*/ "", "", "", "", + /*Z0-Z3*/ "", "", "led-fault-n", "output-bmc-throttle-n", + /*Z4-Z7*/ "", "", "", "", + /*AA0-AA3*/ "input-cpu1-thermtrip-latch-n", "", "input-cpu1-prochot-n", "", + /*AA4-AC7*/ "", "", "", "", + /*AB0-AB3*/ "", "", "", "", + /*AB4-AC7*/ "", "", "", "", + /*AC0-AC3*/ "", "", "", "", + /*AC4-AC7*/ "", "", "", ""; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + label = "bmc"; + m25p,fast-read; + spi-max-frequency = <10000000>; +#include "openbmc-flash-layout-64.dtsi" + }; +}; + +&uart5 { + status = "okay"; +}; + +&vuart { + status = "okay"; +}; + +&mac0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; + + nvmem-cells = <ð0_macaddress>; + nvmem-cell-names = "mac-address"; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii2_default &pinctrl_mdio2_default>; + use-ncsi; + + nvmem-cells = <ð1_macaddress>; + nvmem-cell-names = "mac-address"; +}; + +&i2c0 { + /* SMBus on auxiliary panel header (AUX_PANEL1) */ + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + w83773g@4c { + compatible = "nuvoton,w83773g"; + reg = <0x4c>; + }; +}; + +&i2c2 { + /* PSU SMBus (PSU_SMB1) */ + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + i2c-mux@70 { + compatible = "nxp,pca9545"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + i2c4mux0ch0: i2c@0 { + /* SMBus on PCI express 16x slot */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c4mux0ch1: i2c@1 { + /* SMBus on PCI express 8x slot */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c4mux0ch2: i2c@2 { + /* Unknown */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c4mux0ch3: i2c@3 { + /* SMBus on PCI express 1x slot */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c7 { + /* FRU and SPD EEPROM SMBus */ + status = "okay"; + + eeprom@57 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x57>; + pagesize = <16>; + #address-cells = <1>; + #size-cells = <1>; + + eth0_macaddress: macaddress@3f80 { + reg = <0x3f80 6>; + }; + + eth1_macaddress: macaddress@3f88 { + reg = <0x3f88 6>; + }; + }; +}; + +&gfx { + status = "okay"; +}; + +&pinctrl { + aspeed,external-nodes = <&gfx &lhc>; +}; + +&vhub { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&kcs3 { + aspeed,lpc-io-reg = <0xca2>; + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&p2a { + status = "okay"; + memory-region = <&pci_memory>; +}; + +&video { + status = "okay"; + memory-region = <&video_engine_memory>; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm2_default + &pinctrl_pwm3_default + &pinctrl_pwm4_default + &pinctrl_pwm5_default>; + + fan@0 { + /* FAN1 (4-pin) */ + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + /* FAN2 (4-pin) */ + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + /* FAN3 (4-pin) */ + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + /* FAN4 (6-pin) */ + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0b>; + }; + + fan@4 { + /* FAN6 (6-pin) */ + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0d>; + }; + + fan@5 { + /* FAN5 (6-pin) */ + reg = <0x05>; + aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0c>; + }; +}; + +&adc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_default + &pinctrl_adc1_default + &pinctrl_adc2_default + &pinctrl_adc3_default + &pinctrl_adc4_default + &pinctrl_adc5_default + &pinctrl_adc6_default + &pinctrl_adc7_default + &pinctrl_adc8_default + &pinctrl_adc9_default + &pinctrl_adc10_default + &pinctrl_adc11_default + &pinctrl_adc12_default + &pinctrl_adc13_default + &pinctrl_adc14_default + &pinctrl_adc15_default>; +}; -- cgit v1.2.3 From 3af11cbbb17c2b2082f57dfc5bfc7ee1fc22000e Mon Sep 17 00:00:00 2001 From: Renze Nicolai Date: Wed, 3 Apr 2024 15:28:51 +0200 Subject: ARM: dts: aspeed: Modify GPIO table for Asrock X570D4U BMC Restructure GPIO table to fit maximum line length. Fix mistakes found while working on OpenBMC userland configuration and based on probing the board. Schematic for this board is not available. Because of this the choice was made to use a descriptive method for naming the GPIOs. - Push-pull outputs start with output-* - Open-drain outputs start with control-* - LED outputs start with led-* - Inputs start with input-* - Button inputs start with button-* - Active low signals end with *-n Signed-off-by: Renze Nicolai Signed-off-by: Andrew Jeffery --- .../boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 95 +++++++++------------- 1 file changed, 37 insertions(+), 58 deletions(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts index 3c975bc41ae7..dff69d6ff146 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts @@ -79,64 +79,43 @@ &gpio { status = "okay"; gpio-line-names = - /*A0-A3*/ "status-locatorled-n", "", "button-nmi-n", "", - /*A4-A7*/ "", "", "", "", - /*B0-B3*/ "input-bios-post-cmplt-n", "", "", "", - /*B4-B7*/ "", "", "", "", - /*C0-C3*/ "", "", "", "", - /*C4-C7*/ "", "", "control-locatorbutton", "", - /*D0-D3*/ "button-power", "control-power", "button-reset", "control-reset", - /*D4-D7*/ "", "", "", "", - /*E0-E3*/ "", "", "", "", - /*E4-E7*/ "", "", "", "", - /*F0-F3*/ "", "", "", "", - /*F4-F7*/ "", "", "", "", - /*G0-G3*/ "output-rtc-battery-voltage-read-enable", "input-id0", "input-id1", "input-id2", - /*G4-G7*/ "input-alert1-n", "input-alert2-n", "input-alert3-n", "", - /*H0-H3*/ "", "", "", "", - /*H4-H7*/ "input-mfg", "", "led-heartbeat-n", "input-caseopen", - /*I0-I3*/ "", "", "", "", - /*I4-I7*/ "", "", "", "", - /*J0-J3*/ "output-bmc-ready", "", "", "", - /*J4-J7*/ "", "", "", "", - /*K0-K3*/ "", "", "", "", - /*K4-K7*/ "", "", "", "", - /*L0-L3*/ "", "", "", "", - /*L4-L7*/ "", "", "", "", - /*M0-M3*/ "", "", "", "", - /*M4-M7*/ "", "", "", "", - /*N0-N3*/ "", "", "", "", - /*N4-N7*/ "", "", "", "", - /*O0-O3*/ "", "", "", "", - /*O4-O7*/ "", "", "", "", - /*P0-P3*/ "", "", "", "", - /*P4-P7*/ "", "", "", "", - /*Q0-Q3*/ "", "", "", "", - /*Q4-Q7*/ "", "", "", "", - /*R0-R3*/ "", "", "", "", - /*R4-R7*/ "", "", "", "", - /*S0-S3*/ "input-bmc-pchhot-n", "", "", "", - /*S4-S7*/ "", "", "", "", - /*T0-T3*/ "", "", "", "", - /*T4-T7*/ "", "", "", "", - /*U0-U3*/ "", "", "", "", - /*U4-U7*/ "", "", "", "", - /*V0-V3*/ "", "", "", "", - /*V4-V7*/ "", "", "", "", - /*W0-W3*/ "", "", "", "", - /*W4-W7*/ "", "", "", "", - /*X0-X3*/ "", "", "", "", - /*X4-X7*/ "", "", "", "", - /*Y0-Y3*/ "", "", "", "", - /*Y4-Y7*/ "", "", "", "", - /*Z0-Z3*/ "", "", "led-fault-n", "output-bmc-throttle-n", - /*Z4-Z7*/ "", "", "", "", - /*AA0-AA3*/ "input-cpu1-thermtrip-latch-n", "", "input-cpu1-prochot-n", "", - /*AA4-AC7*/ "", "", "", "", - /*AB0-AB3*/ "", "", "", "", - /*AB4-AC7*/ "", "", "", "", - /*AC0-AC3*/ "", "", "", "", - /*AC4-AC7*/ "", "", "", ""; + /* A */ "input-locatorled-n", "", "", "", "", "", "", "", + /* B */ "input-bios-post-cmplt-n", "", "", "", "", "", "", "", + /* C */ "", "", "", "", "", "", "control-locatorbutton-n", "", + /* D */ "button-power-n", "control-power-n", "button-reset-n", + "control-reset-n", "", "", "", "", + /* E */ "", "", "", "", "", "", "", "", + /* F */ "", "", "", "", "", "", "", "", + /* G */ "output-hwm-vbat-enable", "input-id0-n", "input-id1-n", + "input-id2-n", "input-aux-smb-alert-n", "", + "input-psu-smb-alert-n", "", + /* H */ "", "", "", "", "input-mfg-mode-n", "", + "led-heartbeat-n", "input-case-open-n", + /* I */ "", "", "", "", "", "", "", "", + /* J */ "output-bmc-ready-n", "", "", "", "", "", "", "", + /* K */ "", "", "", "", "", "", "", "", + /* L */ "", "", "", "", "", "", "", "", + /* M */ "", "", "", "", "", "", "", "", + /* N */ "", "", "", "", "", "", "", "", + /* O */ "", "", "", "", "", "", "", "", + /* P */ "", "", "", "", "", "", "", "", + /* Q */ "", "", "", "", "input-bmc-smb-present-n", "", "", + "input-pcie-wake-n", + /* R */ "", "", "", "", "", "", "", "", + /* S */ "input-bmc-pchhot-n", "", "", "", "", "", "", "", + /* T */ "", "", "", "", "", "", "", "", + /* U */ "", "", "", "", "", "", "", "", + /* V */ "", "", "", "", "", "", "", "", + /* W */ "", "", "", "", "", "", "", "", + /* X */ "", "", "", "", "", "", "", "", + /* Y */ "input-sleep-s3-n", "input-sleep-s5-n", "", "", "", "", + "", "", + /* Z */ "", "", "led-fault-n", "output-bmc-throttle-n", "", "", + "", "", + /* AA */ "input-cpu1-thermtrip-latch-n", "", + "input-cpu1-prochot-n", "", "", "", "", "", + /* AB */ "", "input-power-good", "", "", "", "", "", "", + /* AC */ "", "", "", "", "", "", "", ""; }; &fmc { -- cgit v1.2.3 From 62429c485a97038b22b1a18bc27df5579bbfe44a Mon Sep 17 00:00:00 2001 From: Renze Nicolai Date: Wed, 3 Apr 2024 15:28:52 +0200 Subject: ARM: dts: aspeed: Disable unused ADC channels for Asrock X570D4U BMC Additionally adds labels describing the ADC channels. Signed-off-by: Renze Nicolai Signed-off-by: Andrew Jeffery --- .../boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 29 ++++++++++------------ 1 file changed, 13 insertions(+), 16 deletions(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts index dff69d6ff146..66318ef8caae 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts @@ -337,20 +337,17 @@ &adc { status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_adc0_default - &pinctrl_adc1_default - &pinctrl_adc2_default - &pinctrl_adc3_default - &pinctrl_adc4_default - &pinctrl_adc5_default - &pinctrl_adc6_default - &pinctrl_adc7_default - &pinctrl_adc8_default - &pinctrl_adc9_default - &pinctrl_adc10_default - &pinctrl_adc11_default - &pinctrl_adc12_default - &pinctrl_adc13_default - &pinctrl_adc14_default - &pinctrl_adc15_default>; + pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */ + &pinctrl_adc1_default /* 5VSB */ + &pinctrl_adc2_default /* VCPU */ + &pinctrl_adc3_default /* VSOC */ + &pinctrl_adc4_default /* VCCM */ + &pinctrl_adc5_default /* APU-VDDP */ + &pinctrl_adc6_default /* PM-VDD-CLDO */ + &pinctrl_adc7_default /* PM-VDDCR-S5 */ + &pinctrl_adc8_default /* PM-VDDCR */ + &pinctrl_adc9_default /* VBAT */ + &pinctrl_adc10_default /* 3V */ + &pinctrl_adc11_default /* 5V */ + &pinctrl_adc12_default>; /* 12V */ }; -- cgit v1.2.3 From c61838aa458b5f96d5824733bef164da2d7ee860 Mon Sep 17 00:00:00 2001 From: Renze Nicolai Date: Wed, 3 Apr 2024 15:28:53 +0200 Subject: ARM: dts: aspeed: Modify I2C bus configuration Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U mainboard. Additionally adds a descriptive comment to I2C busses 1 and 5. Signed-off-by: Renze Nicolai Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts index 66318ef8caae..8dee4faa9e07 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts @@ -162,6 +162,7 @@ }; &i2c1 { + /* Hardware monitoring SMBus */ status = "okay"; w83773g@4c { @@ -219,6 +220,7 @@ }; &i2c5 { + /* SMBus on BMC connector (BMC_SMB_1) */ status = "okay"; }; @@ -243,6 +245,11 @@ }; }; +&i2c8 { + /* SMBus on intelligent platform management bus header (IPMB_1) */ + status = "okay"; +}; + &gfx { status = "okay"; }; -- cgit v1.2.3