From 6ee9b93999a9efb4529dbc78deb524ec890aba1a Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:50 +0800 Subject: ARM: dts: aspeed: minerva: Revise the name of DTS The project Minerva which is the platform used by Meta has two boards: the Chassis Management Module (Minerva) and the Motherboard (Harma), so change the DTS name to minerva here for CMM use. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-2-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 265 +++++++++++++++++++++ 1 file changed, 265 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts new file mode 100644 index 000000000000..c755fb3258a4 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -0,0 +1,265 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (c) 2023 Facebook Inc. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include +#include + +/ { + model = "Facebook Minerva CMM"; + compatible = "facebook,minerva-cmc", "aspeed,ast2600"; + + aliases { + serial5 = &uart5; + }; + + chosen { + stdout-path = "serial5:57600n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 2>; + }; +}; + +&uart6 { + status = "okay"; +}; + +&wdt1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; + aspeed,reset-type = "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration = <256>; +}; + +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + use-ncsi; + mlx,multi-host; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout-128.dtsi" + }; + flash@1 { + status = "okay"; + m25p,fast-read; + label = "alt-bmc"; + spi-max-frequency = <50000000>; + }; +}; + +&rtc { + status = "okay"; +}; + +&sgpiom1 { + status = "okay"; + ngpios = <128>; + bus-frequency = <2000000>; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + temperature-sensor@4b { + compatible = "ti,tmp75"; + reg = <0x4B>; + }; + + eeprom@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + }; +}; + +&i2c2 { + status = "okay"; + + i2c-mux@77 { + compatible = "nxp,pca9548"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; + }; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; + multi-master; + + ipmb@10 { + compatible = "ipmb-dev"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + i2c-protocol; + }; +}; + +&i2c15 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; +}; + +&adc0 { + aspeed,int-vref-microvolt = <2500000>; + status = "okay"; + pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default + &pinctrl_adc2_default &pinctrl_adc3_default + &pinctrl_adc4_default &pinctrl_adc5_default + &pinctrl_adc6_default &pinctrl_adc7_default>; +}; + +&adc1 { + aspeed,int-vref-microvolt = <2500000>; + status = "okay"; + pinctrl-0 = <&pinctrl_adc10_default>; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; -- cgit v1.2.3 From cb188e3f275fd4827722d271d94d1e77b6207040 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:51 +0800 Subject: ARM: dts: aspeed: minerva: Modify mac3 setting Remove the unuse setting and fix the link to 100 M Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-3-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index c755fb3258a4..9979dba1ef0e 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -48,10 +48,13 @@ &mac3 { status = "okay"; + phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rmii4_default>; - use-ncsi; - mlx,multi-host; + fixed-link { + speed = <100>; + full-duplex; + }; }; &fmc { -- cgit v1.2.3 From 8061d80d7a6bd33598d82a4cbcd06dd78c691e7d Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:52 +0800 Subject: ARM: dts: aspeed: minerva: Change sgpio use Correct the sgpio use from sgpiom1 to sgpiom0 Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-4-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 9979dba1ef0e..ad77057f921c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -78,7 +78,7 @@ status = "okay"; }; -&sgpiom1 { +&sgpiom0 { status = "okay"; ngpios = <128>; bus-frequency = <2000000>; -- cgit v1.2.3 From 331dfa00f4ae8595e86f798951a10c1bbfa67880 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:53 +0800 Subject: ARM: dts: aspeed: minerva: Enable power monitor device Enable power monitor device ina230 and ltc2945 on the i2c bus 0 Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-5-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index ad77057f921c..ee9691647e4a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -86,6 +86,28 @@ &i2c0 { status = "okay"; + + power-monitor@40 { + compatible = "ti,ina230"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + + power-monitor@41 { + compatible = "ti,ina230"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + + power-monitor@67 { + compatible = "adi,ltc2945"; + reg = <0x67>; + }; + + power-monitor@68 { + compatible = "adi,ltc2945"; + reg = <0x68>; + }; }; &i2c1 { -- cgit v1.2.3 From feab10df422f866434ee812c40ce5fd1c30049b8 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:54 +0800 Subject: ARM: dts: aspeed: minerva: Add temperature sensor Add one temperature sensor on i2c bus 1 Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-6-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index ee9691647e4a..783d4d5a8f3d 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -115,7 +115,12 @@ temperature-sensor@4b { compatible = "ti,tmp75"; - reg = <0x4B>; + reg = <0x4b>; + }; + + temperature-sensor@48 { + compatible = "ti,tmp75"; + reg = <0x48>; }; eeprom@51 { -- cgit v1.2.3 From 37f295a28eda57e5582add64194358153217c467 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:55 +0800 Subject: ARM: dts: aspeed: minerva: correct the address of eeprom Correct the address from 0x51 to 0x54 of eeprom on the i2c bus 1 Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-7-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 783d4d5a8f3d..f2a48033ac5c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -123,9 +123,9 @@ reg = <0x48>; }; - eeprom@51 { + eeprom@54 { compatible = "atmel,24c128"; - reg = <0x51>; + reg = <0x54>; }; }; -- cgit v1.2.3 From b2daa191f75b6bd51acc6df7b190ed71a25d9de0 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:56 +0800 Subject: ARM: dts: aspeed: minerva: add bus labels and aliases Add bus labels and aliases for the fan control board. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-8-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index f2a48033ac5c..f4cb5ef72310 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -12,6 +12,16 @@ aliases { serial5 = &uart5; + /* + * PCA9548 (2-0077) provides 8 channels connecting to + * 6 pcs of FCB (Fan Controller Board). + */ + i2c16 = &imux16; + i2c17 = &imux17; + i2c18 = &imux18; + i2c19 = &imux19; + i2c20 = &imux20; + i2c21 = &imux21; }; chosen { @@ -139,7 +149,7 @@ #size-cells = <0>; i2c-mux-idle-disconnect; - i2c@0 { + imux16: i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -150,7 +160,7 @@ }; }; - i2c@1 { + imux17: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -161,7 +171,7 @@ }; }; - i2c@2 { + imux18: i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; @@ -172,7 +182,7 @@ }; }; - i2c@3 { + imux19: i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; @@ -183,7 +193,7 @@ }; }; - i2c@4 { + imux20: i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; @@ -194,7 +204,7 @@ }; }; - i2c@5 { + imux21: i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <5>; -- cgit v1.2.3 From 2dcb5ca763acbaa56b6be3bee49bb2e8b91c92e4 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:57 +0800 Subject: ARM: dts: aspeed: minerva: add fan rpm controller Add fan rpm controller max31790 on all bus of FCB. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-9-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index f4cb5ef72310..c7445c819baf 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -158,6 +158,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; imux17: i2c@1 { @@ -169,6 +176,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; imux18: i2c@2 { @@ -180,6 +194,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; imux19: i2c@3 { @@ -191,6 +212,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; imux20: i2c@4 { @@ -202,6 +230,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; imux21: i2c@5 { @@ -213,6 +248,13 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + pwm@5e{ + compatible = "max31790"; + reg = <0x5e>; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; }; -- cgit v1.2.3 From bb4d30382468705c4084348149ae06af0cc124cc Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:58 +0800 Subject: ARM: dts: aspeed: minerva: Add led-fan-fault gpio Add led-fan-fault gpio pin on the PCA9555 on the i2c bus 0. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-10-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index c7445c819baf..090fe2f6b1d8 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -39,6 +39,16 @@ <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, <&adc1 2>; }; + + leds { + compatible = "gpio-leds"; + + led-fan-fault { + label = "led-fan-fault"; + gpios = <&leds_gpio 9 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; }; &uart6 { @@ -118,6 +128,13 @@ compatible = "adi,ltc2945"; reg = <0x68>; }; + + leds_gpio: gpio@19 { + compatible = "nxp,pca9555"; + reg = <0x19>; + gpio-controller; + #gpio-cells = <2>; + }; }; &i2c1 { -- cgit v1.2.3 From 25a56a921ca28ec77c1d47c2907fce7d36331863 Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:51:59 +0800 Subject: ARM: dts: aspeed: minerva: add gpio line name Add the GPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-11-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 090fe2f6b1d8..31197183cc59 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -362,3 +362,33 @@ &uhci { status = "okay"; }; + +&gpio0 { + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "","","","","","","","", + /*C0-C7*/ "","","","","BLADE_UART_SEL2","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","","", + /*G0-G7*/ "","","","","","","","", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","BLADE_UART_SEL0","","","", + /*M0-M7*/ "","","","","","BLADE_UART_SEL1","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","","","","","", + /*P0-P7*/ "","","","","","","","", + /*Q0-Q7*/ "","","","","","","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","BAT_DETECT","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","BLADE_UART_SEL3","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; +}; -- cgit v1.2.3 From 51493f0fd68daf5a60f54314d3424c4c82b106ce Mon Sep 17 00:00:00 2001 From: Yang Chen Date: Tue, 12 Dec 2023 15:52:00 +0800 Subject: ARM: dts: aspeed: minerva: add sgpio line name Add the SGPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20231212075200.983536-12-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley Signed-off-by: Andrew Jeffery --- .../dts/aspeed/aspeed-bmc-facebook-minerva.dts | 149 +++++++++++++++++++++ 1 file changed, 149 insertions(+) (limited to 'arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 31197183cc59..942e53d5c714 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -392,3 +392,152 @@ /*Y0-Y7*/ "","","","","","","","", /*Z0-Z7*/ "","","","","","","",""; }; + +&sgpiom0 { + gpio-line-names = + /*"input pin","output pin"*/ + /*A0 - A7*/ + "PRSNT_MTIA_BLADE0_N","PWREN_MTIA_BLADE0_EN", + "PRSNT_MTIA_BLADE1_N","PWREN_MTIA_BLADE1_EN", + "PRSNT_MTIA_BLADE2_N","PWREN_MTIA_BLADE2_EN", + "PRSNT_MTIA_BLADE3_N","PWREN_MTIA_BLADE3_EN", + "PRSNT_MTIA_BLADE4_N","PWREN_MTIA_BLADE4_EN", + "PRSNT_MTIA_BLADE5_N","PWREN_MTIA_BLADE5_EN", + "PRSNT_MTIA_BLADE6_N","PWREN_MTIA_BLADE6_EN", + "PRSNT_MTIA_BLADE7_N","PWREN_MTIA_BLADE7_EN", + /*B0 - B7*/ + "PRSNT_MTIA_BLADE8_N","PWREN_MTIA_BLADE8_EN", + "PRSNT_MTIA_BLADE9_N","PWREN_MTIA_BLADE9_EN", + "PRSNT_MTIA_BLADE10_N","PWREN_MTIA_BLADE10_EN", + "PRSNT_MTIA_BLADE11_N","PWREN_MTIA_BLADE11_EN", + "PRSNT_MTIA_BLADE12_N","PWREN_MTIA_BLADE12_EN", + "PRSNT_MTIA_BLADE13_N","PWREN_MTIA_BLADE13_EN", + "PRSNT_MTIA_BLADE14_N","PWREN_MTIA_BLADE14_EN", + "PRSNT_MTIA_BLADE15_N","PWREN_MTIA_BLADE15_EN", + /*C0 - C7*/ + "PRSNT_NW_BLADE0_N","PWREN_NW_BLADE0_EN", + "PRSNT_NW_BLADE1_N","PWREN_NW_BLADE1_EN", + "PRSNT_NW_BLADE2_N","PWREN_NW_BLADE2_EN", + "PRSNT_NW_BLADE3_N","PWREN_NW_BLADE3_EN", + "PRSNT_NW_BLADE4_N","PWREN_NW_BLADE4_EN", + "PRSNT_NW_BLADE5_N","PWREN_NW_BLADE5_EN", + "PRSNT_FCB_TOP_0_N","PWREN_MTIA_BLADE0_HSC_EN", + "PRSNT_FCB_TOP_1_N","PWREN_MTIA_BLADE1_HSC_EN", + /*D0 - D7*/ + "PRSNT_FCB_MIDDLE_0_N","PWREN_MTIA_BLADE2_HSC_EN", + "PRSNT_FCB_MIDDLE_1_N","PWREN_MTIA_BLADE3_HSC_EN", + "PRSNT_FCB_BOTTOM_0_N","PWREN_MTIA_BLADE4_HSC_EN", + "PRSNT_FCB_BOTTOM_1_N","PWREN_MTIA_BLADE5_HSC_EN", + "PWRGD_MTIA_BLADE0_PWROK_L_BUF","PWREN_MTIA_BLADE6_HSC_EN", + "PWRGD_MTIA_BLADE1_PWROK_L_BUF","PWREN_MTIA_BLADE7_HSC_EN", + "PWRGD_MTIA_BLADE2_PWROK_L_BUF","PWREN_MTIA_BLADE8_HSC_EN", + "PWRGD_MTIA_BLADE3_PWROK_L_BUF","PWREN_MTIA_BLADE9_HSC_EN", + /*E0 - E7*/ + "PWRGD_MTIA_BLADE4_PWROK_L_BUF","PWREN_MTIA_BLADE10_HSC_EN", + "PWRGD_MTIA_BLADE5_PWROK_L_BUF","PWREN_MTIA_BLADE11_HSC_EN", + "PWRGD_MTIA_BLADE6_PWROK_L_BUF","PWREN_MTIA_BLADE12_HSC_EN", + "PWRGD_MTIA_BLADE7_PWROK_L_BUF","PWREN_MTIA_BLADE13_HSC_EN", + "PWRGD_MTIA_BLADE8_PWROK_L_BUF","PWREN_MTIA_BLADE14_HSC_EN", + "PWRGD_MTIA_BLADE9_PWROK_L_BUF","PWREN_MTIA_BLADE15_HSC_EN", + "PWRGD_MTIA_BLADE10_PWROK_L_BUF","PWREN_NW_BLADE0_HSC_EN", + "PWRGD_MTIA_BLADE11_PWROK_L_BUF","PWREN_NW_BLADE1_HSC_EN", + /*F0 - F7*/ + "PWRGD_MTIA_BLADE12_PWROK_L_BUF","PWREN_NW_BLADE2_HSC_EN", + "PWRGD_MTIA_BLADE13_PWROK_L_BUF","PWREN_NW_BLADE3_HSC_EN", + "PWRGD_MTIA_BLADE14_PWROK_L_BUF","PWREN_NW_BLADE4_HSC_EN", + "PWRGD_MTIA_BLADE15_PWROK_L_BUF","PWREN_NW_BLADE5_HSC_EN", + "PWRGD_NW_BLADE0_PWROK_L_BUF","PWREN_FCB_TOP_L_EN", + "PWRGD_NW_BLADE1_PWROK_L_BUF","PWREN_FCB_TOP_R_EN", + "PWRGD_NW_BLADE2_PWROK_L_BUF","PWREN_FCB_MIDDLE_L_EN", + "PWRGD_NW_BLADE3_PWROK_L_BUF","PWREN_FCB_MIDDLE_R_EN", + /*G0 - G7*/ + "PWRGD_NW_BLADE4_PWROK_L_BUF","PWREN_FCB_BOTTOM_L_EN", + "PWRGD_NW_BLADE5_PWROK_L_BUF","PWREN_FCB_BOTTOM_R_EN", + "PWRGD_FCB_TOP_0_PWROK_L_BUF","FM_CMM_AC_CYCLE_N", + "PWRGD_FCB_TOP_1_PWROK_L_BUF","MGMT_SFP_TX_DIS", + "PWRGD_FCB_MIDDLE_0_PWROK_L_BUF","", + "PWRGD_FCB_MIDDLE_1_PWROK_L_BUF","RST_I2CRST_MTIA_BLADE0_1_N", + "PWRGD_FCB_BOTTOM_0_PWROK_L_BUF","RST_I2CRST_MTIA_BLADE2_3_N", + "PWRGD_FCB_BOTTOM_1_PWROK_L_BUF","RST_I2CRST_MTIA_BLADE4_5_N", + /*H0 - H7*/ + "LEAK_DETECT_MTIA_BLADE0_N_BUF","RST_I2CRST_MTIA_BLADE6_7_N", + "LEAK_DETECT_MTIA_BLADE1_N_BUF","RST_I2CRST_MTIA_BLADE8_9_N", + "LEAK_DETECT_MTIA_BLADE2_N_BUF","RST_I2CRST_MTIA_BLADE10_11_N", + "LEAK_DETECT_MTIA_BLADE3_N_BUF","RST_I2CRST_MTIA_BLADE12_13_N", + "LEAK_DETECT_MTIA_BLADE4_N_BUF","RST_I2CRST_MTIA_BLADE14_15_N", + "LEAK_DETECT_MTIA_BLADE5_N_BUF","RST_I2CRST_NW_BLADE0_1_2_N", + "LEAK_DETECT_MTIA_BLADE6_N_BUF","RST_I2CRST_NW_BLADE3_4_5_N", + "LEAK_DETECT_MTIA_BLADE7_N_BUF","RST_I2CRST_FCB_N", + /*I0 - I7*/ + "LEAK_DETECT_MTIA_BLADE8_N_BUF","RST_I2CRST_FCB_B_L_N", + "LEAK_DETECT_MTIA_BLADE9_N_BUF","RST_I2CRST_FCB_B_R_N", + "LEAK_DETECT_MTIA_BLADE10_N_BUF","RST_I2CRST_FCB_M_L_N", + "LEAK_DETECT_MTIA_BLADE11_N_BUF","RST_I2CRST_FCB_M_R_N", + "LEAK_DETECT_MTIA_BLADE12_N_BUF","RST_I2CRST_FCB_T_L_N", + "LEAK_DETECT_MTIA_BLADE13_N_BUF","RST_I2CRST_FCB_T_R_N", + "LEAK_DETECT_MTIA_BLADE14_N_BUF","BMC_READY", + "LEAK_DETECT_MTIA_BLADE15_N_BUF","wFM_88E6393X_BIN_UPDATE_EN_N", + /*J0 - J7*/ + "LEAK_DETECT_NW_BLADE0_N_BUF","WATER_VALVE_CLOSED_N", + "LEAK_DETECT_NW_BLADE1_N_BUF","", + "LEAK_DETECT_NW_BLADE2_N_BUF","", + "LEAK_DETECT_NW_BLADE3_N_BUF","", + "LEAK_DETECT_NW_BLADE4_N_BUF","", + "LEAK_DETECT_NW_BLADE5_N_BUF","", + "MTIA_BLADE0_STATUS_LED","", + "MTIA_BLADE1_STATUS_LED","", + /*K0 - K7*/ + "MTIA_BLADE2_STATUS_LED","", + "MTIA_BLADE3_STATUS_LED","", + "MTIA_BLADE4_STATUS_LED","", + "MTIA_BLADE5_STATUS_LED","", + "MTIA_BLADE6_STATUS_LED","", + "MTIA_BLADE7_STATUS_LED","", + "MTIA_BLADE8_STATUS_LED","", + "MTIA_BLADE9_STATUS_LED","", + /*L0 - L7*/ + "MTIA_BLADE10_STATUS_LED","", + "MTIA_BLADE11_STATUS_LED","", + "MTIA_BLADE12_STATUS_LED","", + "MTIA_BLADE13_STATUS_LED","", + "MTIA_BLADE14_STATUS_LED","", + "MTIA_BLADE15_STATUS_LED","", + "NW_BLADE0_STATUS_LED","", + "NW_BLADE1_STATUS_LED","", + /*M0 - M7*/ + "NW_BLADE2_STATUS_LED","", + "NW_BLADE3_STATUS_LED","", + "NW_BLADE4_STATUS_LED","", + "NW_BLADE5_STATUS_LED","", + "RPU_READY","", + "IT_GEAR_RPU_LINK_N","", + "IT_GEAR_LEAK","", + "WATER_VALVE_CLOSED_N","", + /*N0 - N7*/ + "VALVE_STS0","", + "VALVE_STS1","", + "VALVE_STS2","", + "VALVE_STS3","", + "CR_TOGGLE_BOOT_BUF_N","", + "CMM_LC_RDY_LED_N","", + "CMM_LC_UNRDY_LED_N","", + "CMM_CABLE_CARTRIDGE_PRSNT_BOT_N","", + /*O0 - O7*/ + "CMM_CABLE_CARTRIDGE_PRSNT_TOP_N","", + "BOT_BCB_CABLE_PRSNT_N","", + "TOP_BCB_CABLE_PRSNT_N","", + "CHASSIS0_LEAK_Q_N","", + "CHASSIS1_LEAK_Q_N","", + "LEAK0_DETECT","", + "LEAK1_DETECT","", + "MGMT_SFP_PRSNT_N","", + /*P0 - P7*/ + "MGMT_SFP_TX_FAULT","", + "MGMT_SFP_RX_LOS","", + "","", + "","", + "","", + "","", + "","", + "",""; +}; -- cgit v1.2.3