From 3042a7e557cd0cf2be9c58363c1032b6cacac798 Mon Sep 17 00:00:00 2001 From: Peter Yin Date: Fri, 12 Apr 2024 17:15:53 +0800 Subject: ARM: dts: aspeed: Harma: Add spi-gpio Add spi-gpio for tpm device. Signed-off-by: Peter Yin Link: https://lore.kernel.org/r/20240412091600.2534693-6-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery --- .../boot/dts/aspeed/aspeed-bmc-facebook-harma.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts index 36aad01dda20..ca3052cce0e0 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts @@ -28,6 +28,8 @@ i2c29 = &imux29; i2c30 = &imux30; i2c31 = &imux31; + + spi1 = &spi_gpio; }; chosen { @@ -67,6 +69,25 @@ gpios = <&gpio0 124 GPIO_ACTIVE_HIGH>; }; }; + + spi_gpio: spi-gpio { + status = "okay"; + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; + + tpmdev@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + spi-max-frequency = <33000000>; + reg = <0>; + }; + }; }; // HOST BIOS Debug -- cgit v1.2.3