From c61838aa458b5f96d5824733bef164da2d7ee860 Mon Sep 17 00:00:00 2001 From: Renze Nicolai Date: Wed, 3 Apr 2024 15:28:53 +0200 Subject: ARM: dts: aspeed: Modify I2C bus configuration Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U mainboard. Additionally adds a descriptive comment to I2C busses 1 and 5. Signed-off-by: Renze Nicolai Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts index 66318ef8caae..8dee4faa9e07 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts @@ -162,6 +162,7 @@ }; &i2c1 { + /* Hardware monitoring SMBus */ status = "okay"; w83773g@4c { @@ -219,6 +220,7 @@ }; &i2c5 { + /* SMBus on BMC connector (BMC_SMB_1) */ status = "okay"; }; @@ -243,6 +245,11 @@ }; }; +&i2c8 { + /* SMBus on intelligent platform management bus header (IPMB_1) */ + status = "okay"; +}; + &gfx { status = "okay"; }; -- cgit v1.2.3