From a08ab63761730634bbbf8f361d1a058c1f4af9c5 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:39 +0100 Subject: [ARM] S3C64XX: Initial arch directory Add the initial PLAT_S3C64XX support files and directory structure. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/Kconfig | 8 ++++++++ arch/arm/mach-s3c6400/Makefile | 15 +++++++++++++++ arch/arm/mach-s3c6400/Makefile.boot | 2 ++ arch/arm/mach-s3c6400/include/mach/memory.h | 21 +++++++++++++++++++++ 4 files changed, 46 insertions(+) create mode 100644 arch/arm/mach-s3c6400/Kconfig create mode 100644 arch/arm/mach-s3c6400/Makefile create mode 100644 arch/arm/mach-s3c6400/Makefile.boot create mode 100644 arch/arm/mach-s3c6400/include/mach/memory.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig new file mode 100644 index 000000000000..6da82b5c09ba --- /dev/null +++ b/arch/arm/mach-s3c6400/Kconfig @@ -0,0 +1,8 @@ +# arch/arm/mach-s3c6400/Kconfig +# +# Copyright 2008 Openmoko, Inc. +# Simtec Electronics, Ben Dooks +# +# Licensed under GPLv2 + +# Currently nothing here, this will be added later diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile new file mode 100644 index 000000000000..8f397db25b87 --- /dev/null +++ b/arch/arm/mach-s3c6400/Makefile @@ -0,0 +1,15 @@ +# arch/arm/mach-s3c6400/Makefile +# +# Copyright 2008 Openmoko, Inc. +# Copyright 2008 Simtec Electronics +# +# Licensed under GPLv2 + +obj-y := +obj-m := +obj-n := +obj- := + +# Core support for S3C6400 system + +obj-n += blank.o diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c6400/Makefile.boot new file mode 100644 index 000000000000..ba41fdc0a586 --- /dev/null +++ b/arch/arm/mach-s3c6400/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x50008000 +params_phys-y := 0x50000100 diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c6400/include/mach/memory.h new file mode 100644 index 000000000000..38c381132f24 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/memory.h @@ -0,0 +1,21 @@ +/* arch/arm/mach-s3c6400/include/mach/memory.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x50000000) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#endif -- cgit v1.2.3 From d521f87e9c642dbc820cb839039e25a05cb02151 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:40 +0100 Subject: [ARM] S3C64XX: Initial arch header files Add the initial header files for the S3C64XX support to satisfy the minimal requirements to build a kernel. Some definitions will therefore be placeholders or empty functions that will ensure that the system can build and have base functionality. These will be filled in at a later date. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/dma.h | 16 +++++++++++ arch/arm/mach-s3c6400/include/mach/gpio.h | 22 ++++++++++++++++ arch/arm/mach-s3c6400/include/mach/irqs.h | 20 ++++++++++++++ arch/arm/mach-s3c6400/include/mach/regs-irq.h | 20 ++++++++++++++ arch/arm/mach-s3c6400/include/mach/system.h | 24 +++++++++++++++++ arch/arm/plat-s3c64xx/include/plat/irqs.h | 38 +++++++++++++++++++++++++++ 6 files changed, 140 insertions(+) create mode 100644 arch/arm/mach-s3c6400/include/mach/dma.h create mode 100644 arch/arm/mach-s3c6400/include/mach/gpio.h create mode 100644 arch/arm/mach-s3c6400/include/mach/irqs.h create mode 100644 arch/arm/mach-s3c6400/include/mach/regs-irq.h create mode 100644 arch/arm/mach-s3c6400/include/mach/system.h create mode 100644 arch/arm/plat-s3c64xx/include/plat/irqs.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h new file mode 100644 index 000000000000..9771ac2cb07e --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/dma.h @@ -0,0 +1,16 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/dma.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - DMA support + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h new file mode 100644 index 000000000000..8b4254a23d9a --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/gpio.h @@ -0,0 +1,22 @@ +/* arch/arm/mach-s3c6400/include/mach/gpio.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C6400 - GPIO lib support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define gpio_to_irq __gpio_to_irq + +#define ARCH_NR_GPIOS 188 + +#include diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h new file mode 100644 index 000000000000..b38c47cffc28 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/irqs.h @@ -0,0 +1,20 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - IRQ definitions + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H __FILE__ + +#ifndef __ASM_ARM_IRQ_H +#error "Do not include this directly, instead #include " +#endif + +#include + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c6400/include/mach/regs-irq.h new file mode 100644 index 000000000000..bcce68a0bb75 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/regs-irq.h @@ -0,0 +1,20 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C64XX - IRQ register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IRQ_H +#define __ASM_ARCH_REGS_IRQ_H __FILE__ + +#include + +#endif /* __ASM_ARCH_6400_REGS_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c6400/include/mach/system.h new file mode 100644 index 000000000000..652bbc403f0b --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/system.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/system.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - system implementation + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +static void arch_reset(char mode) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h new file mode 100644 index 000000000000..592a56354551 --- /dev/null +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h @@ -0,0 +1,38 @@ +/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - Common IRQ support + */ + +#ifndef __ASM_PLAT_S3C64XX_IRQS_H +#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ + +/* we keep the first set of CPU IRQs out of the range of + * the ISA space, so that the PC104 has them to itself + * and we don't end up having to do horrible things to the + * standard ISA drivers.... + */ + +#define S3C_IRQ_OFFSET (16) + +#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) + +/* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series + * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE + * which we place after the pair of VICs. */ + +#define S3C_IRQ_EINT_BASE S3C_IRQ(64) + +#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) + +/* Define NR_IRQs here, machine specific can always re-define. + * Currently the IRQ_EINT27 is the last one we can have. */ + +#define NR_IRQS (S3C_EINT(27) + 1) + +#endif /* __ASM_PLAT_S3C64XX_IRQS_H */ + -- cgit v1.2.3 From a5209797450a7c95a9b546d83dae163833f16437 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:41 +0100 Subject: [ARM] S3C64XX: Add Add the include for the interrupt entry macros needed to be included by for the kernel interrupt handler. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/entry-macro.S | 44 ++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 arch/arm/mach-s3c6400/include/mach/entry-macro.S (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S new file mode 100644 index 000000000000..fbd90d2cf355 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S @@ -0,0 +1,44 @@ +/* arch/arm/mach-s3c6400/include/mach/entry-macro.S + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * Low-level IRQ helper macros for the Samsung S3C64XX series + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + +#include +#include +#include + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =S3C_VA_VIC0 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + @ check the vic0 + mov \irqnr, # S3C_IRQ_OFFSET + 31 + ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] + teq \irqstat, #0 + + @ otherwise try vic1 + addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm -- cgit v1.2.3 From dcb0902b470deb5500e7e459152859dc4358ca5b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:42 +0100 Subject: [ARM] S3C64XX: Add Add the necessary support for the kernel low-level debug macros via Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/debug-macro.S | 39 +++++++++++++++++++++++ arch/arm/mach-s3c6400/include/mach/hardware.h | 16 ++++++++++ arch/arm/mach-s3c6400/include/mach/map.h | 40 ++++++++++++++++++++++++ 3 files changed, 95 insertions(+) create mode 100644 arch/arm/mach-s3c6400/include/mach/debug-macro.S create mode 100644 arch/arm/mach-s3c6400/include/mach/hardware.h create mode 100644 arch/arm/mach-s3c6400/include/mach/map.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c6400/include/mach/debug-macro.S new file mode 100644 index 000000000000..b18ac5266dfc --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/debug-macro.S @@ -0,0 +1,39 @@ +/* arch/arm/mach-s3c6400/include/mach/debug-macro.S + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include +#include + + /* note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c6400/include/mach/hardware.h new file mode 100644 index 000000000000..862d033e57a4 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/hardware.h @@ -0,0 +1,16 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - Hardware support + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h new file mode 100644 index 000000000000..0ee6be08e748 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/map.h @@ -0,0 +1,40 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/map.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C64XX - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MAP_H +#define __ASM_ARCH_MAP_H __FILE__ + +#include + +#define S3C_PA_UART (0x7F005000) +#define S3C_PA_UART0 (S3C_PA_UART + 0x00) +#define S3C_PA_UART1 (S3C_PA_UART + 0x400) +#define S3C_PA_UART2 (S3C_PA_UART + 0x800) +#define S3C_PA_UART3 (S3C_PA_UART + 0xC00) +#define S3C_UART_OFFSET (0x400) + +#define S3C64XX_PA_TIMER (0x7F006000) + +#define S3C64XX_PA_SDRAM (0x50000000) +#define S3C64XX_PA_VIC0 (0x71200000) +#define S3C64XX_PA_VIC1 (0x71300000) + +/* place VICs close together */ +#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) +#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) + +/* compatibiltiy defines. */ +#define S3C_PA_TIMER S3C64XX_PA_TIMER + +#endif /* __ASM_ARCH_6400_MAP_H */ -- cgit v1.2.3 From e1a2bd1d2f368faaf377fdf8404a685280a3d0a3 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:45 +0100 Subject: [ARM] S3C64XX: Add system boot-time support Add the necessary defines for to function and build an working header code block. Signed-off-by: Ben Doioks --- arch/arm/mach-s3c2410/include/mach/uncompress.h | 1 + arch/arm/mach-s3c6400/include/mach/uncompress.h | 26 +++++++++++++++++++++++++ arch/arm/plat-s3c/include/plat/uncompress.h | 2 +- arch/arm/plat-s3c24xx/include/plat/map.h | 1 + 4 files changed, 29 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-s3c6400/include/mach/uncompress.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h index ab39491beee2..c9432103750d 100644 --- a/arch/arm/mach-s3c2410/include/mach/uncompress.h +++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h @@ -1,3 +1,4 @@ + /* arch/arm/mach-s3c2410/include/mach/uncompress.h * * Copyright (c) 2003, 2007 Simtec Electronics diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c6400/include/mach/uncompress.h new file mode 100644 index 000000000000..cc822c57cc1c --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/uncompress.h @@ -0,0 +1,26 @@ +/* arch/arm/mach-s3c6400/include/mach/uncompress.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C6400 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include +#include + +static void arch_detect_cpu(void) +{ + /* we do not need to do any cpu detection here at the moment. */ +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 8a8a927292e0..eeef32c4312d 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -37,7 +37,7 @@ static void arch_detect_cpu(void); /* how many bytes we allow into the FIFO at a time in FIFO mode */ #define FIFO_MAX (14) -#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT) +#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT) static __inline__ void uart_wr(unsigned int reg, unsigned int val) diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h index 6222ba8341d4..e7be0c0d3702 100644 --- a/arch/arm/plat-s3c24xx/include/plat/map.h +++ b/arch/arm/plat-s3c24xx/include/plat/map.h @@ -29,6 +29,7 @@ #define S3C24XX_VA_UART S3C_VA_UART #define S3C2410_PA_UART (0x50000000) #define S3C24XX_SZ_UART SZ_1M +#define S3C_UART_OFFSET (0x4000) /* Timers */ #define S3C24XX_VA_TIMER S3C_VA_TIMER -- cgit v1.2.3 From beda30f6a9c5f8e1eebd195019a537057cc556fd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:49 +0100 Subject: [ARM] S3C64XX: Basic CPU detection and map initialisation Initialise the basic physical to virtual mappings and then detect the CPU that the system is being run on so that the cpu code code can call the correct initialisation code. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/map.h | 1 + arch/arm/plat-s3c64xx/Makefile | 1 + arch/arm/plat-s3c64xx/cpu.c | 106 +++++++++++++++++++++++++++ arch/arm/plat-s3c64xx/include/plat/s3c6400.h | 33 +++++++++ arch/arm/plat-s3c64xx/include/plat/s3c6410.h | 28 +++++++ 5 files changed, 169 insertions(+) create mode 100644 arch/arm/plat-s3c64xx/cpu.c create mode 100644 arch/arm/plat-s3c64xx/include/plat/s3c6400.h create mode 100644 arch/arm/plat-s3c64xx/include/plat/s3c6410.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h index 0ee6be08e748..de6cdd518cea 100644 --- a/arch/arm/mach-s3c6400/include/mach/map.h +++ b/arch/arm/mach-s3c6400/include/mach/map.h @@ -24,6 +24,7 @@ #define S3C_PA_UART3 (S3C_PA_UART + 0xC00) #define S3C_UART_OFFSET (0x400) +#define S3C64XX_PA_SYSCON (0x7E00F000) #define S3C64XX_PA_TIMER (0x7F006000) #define S3C64XX_PA_SDRAM (0x50000000) diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 178c968bb8da..5d9a1d86ab8e 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -13,3 +13,4 @@ obj- := # Core files obj-y += dev-uart.o +obj-y += cpu.o diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c new file mode 100644 index 000000000000..dc7bf112ec05 --- /dev/null +++ b/arch/arm/plat-s3c64xx/cpu.c @@ -0,0 +1,106 @@ +/* linux/arch/arm/plat-s3c64xx/cpu.c + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C64XX CPU Support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include +#include +#include + +#include +#include + +/* table of supported CPUs */ + +static const char name_s3c6400[] = "S3C6400"; +static const char name_s3c6410[] = "S3C6410"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = 0x36400000, + .idmask = 0xfffff000, + .map_io = s3c6400_map_io, + .init_clocks = s3c6400_init_clocks, + .init_uarts = s3c6400_init_uarts, + .init = s3c6400_init, + .name = name_s3c6400, + }, { + .idcode = 0x36410100, + .idmask = 0xffffff00, + .map_io = s3c6410_map_io, + .init_clocks = s3c6410_init_clocks, + .init_uarts = s3c6410_init_uarts, + .init = s3c6410_init, + .name = name_s3c6410, + }, +}; + +/* minimal IO mapping */ + +/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */ +#define UART_OFFS (S3C_PA_UART & 0xfffff) + +static struct map_desc s3c_iodesc[] __initdata = { + { + .virtual = S3C_VA_SYS, + .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), + .pfn = __phys_to_pfn(S3C_PA_UART), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = S3C_VA_VIC0, + .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = S3C_VA_VIC1, + .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), + .length = SZ_16K, + .type = MT_DEVICE, + }, +}; + +/* read cpu identification code */ + + +void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) +{ + unsigned long idcode; + + /* initialise the io descriptors we need for initialisation */ + iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); + iotable_init(mach_desc, size); + + idcode = __raw_readl(S3C_VA_SYS + 0x118); + s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); +} diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/plat-s3c64xx/include/plat/s3c6400.h new file mode 100644 index 000000000000..142bb3d18cdc --- /dev/null +++ b/arch/arm/plat-s3c64xx/include/plat/s3c6400.h @@ -0,0 +1,33 @@ +/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * Header file for s3c6400 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* Common init code for S3C6400 related SoCs */ + +extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#ifdef CONFIG_CPU_S3C6400 + +extern int s3c6400_init(void); +extern void s3c6400_map_io(void); +extern void s3c6400_init_clocks(int xtal); + +#define s3c6400_init_uarts s3c6400_common_init_uarts + +#else +#define s3c6400_init_clocks NULL +#define s3c6400_init_uarts NULL +#define s3c6400_map_io NULL +#define s3c6400_init NULL +#endif + diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h new file mode 100644 index 000000000000..56f14b5d454b --- /dev/null +++ b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h @@ -0,0 +1,28 @@ +/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * Header file for s3c6410 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C6410 + +extern int s3c6410_init(void); +extern void s3c6410_map_io(void); +extern void s3c6410_init_clocks(int xtal); + +#define s3c6410_init_uarts s3c6400_common_init_uarts + +#else +#define s3c6410_init_clocks NULL +#define s3c6410_init_uarts NULL +#define s3c6410_map_io NULL +#define s3c6410_init NULL +#endif -- cgit v1.2.3 From 59ff6f2c0e02c23df8c94a52ab51963ae22e0463 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:52 +0100 Subject: [ARM] S3C6400: Add Add the necessary support for the timer on the S3C6400 and S3C6410 by adding Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/tick.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 arch/arm/mach-s3c6400/include/mach/tick.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h new file mode 100644 index 000000000000..95e5ec92ee98 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/tick.h @@ -0,0 +1,27 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/tick.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C64XX - Timer tick support definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TICK_H +#define __ASM_ARCH_TICK_H __FILE__ + +/* note, the timer interrutps turn up in 2 places, the vic and then + * the timer block. We take the VIC as the base at the moment. + */ +static inline u32 s3c24xx_ostimer_pending(void) +{ + u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); + return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); +} + +#endif /* __ASM_ARCH_6400_TICK_H */ -- cgit v1.2.3 From c652d2ddb97ccdc4774e149ef998928263fd8886 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:07:01 +0100 Subject: [ARM] S3C: Add TICK_MAX for timer code Add TICK_MAX definition for the timer code as the S3C64XX series have 32bit capable PWM timers. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/tick.h | 2 ++ arch/arm/plat-s3c/time.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h index 95e5ec92ee98..d9c0dc7014ec 100644 --- a/arch/arm/mach-s3c6400/include/mach/tick.h +++ b/arch/arm/mach-s3c6400/include/mach/tick.h @@ -24,4 +24,6 @@ static inline u32 s3c24xx_ostimer_pending(void) return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); } +#define TICK_MAX (0xffffffff) + #endif /* __ASM_ARCH_6400_TICK_H */ diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-s3c/time.c index d35e149f4ebf..a581ff7ba664 100644 --- a/arch/arm/plat-s3c/time.c +++ b/arch/arm/plat-s3c/time.c @@ -44,6 +44,10 @@ static unsigned long timer_startval; static unsigned long timer_usec_ticks; +#ifndef TICK_MAX +#define TICK_MAX (0xffff) +#endif + #define TIMER_USEC_SHIFT 16 /* we use the shifted arithmetic to work out the ratio of timer ticks @@ -156,7 +160,7 @@ static void s3c2410_timer_setup (void) unsigned long tcfg1; unsigned long tcfg0; - tcnt = 0xffff; /* default value for tcnt */ + tcnt = TICK_MAX; /* default value for tcnt */ /* read the current timer configuration bits */ @@ -217,7 +221,7 @@ static void s3c2410_timer_setup (void) tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks); /* check to see if timer is within 16bit range... */ - if (tcnt > 0xffff) { + if (tcnt > TICK_MAX) { panic("setup_timer: HZ is too small, cannot configure timer!"); return; } -- cgit v1.2.3 From 3e694d4bc633a5e6192e63a644a628e7bbab3e64 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:07:05 +0100 Subject: [ARM] S3C64XX: Demux UART interrupts Add demux handling for the UART interrupts generated by the VIC into their seperate IRQs that the serial driver can register. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/map.h | 8 ++ arch/arm/plat-s3c64xx/irq.c | 140 ++++++++++++++++++++++++++++++- 2 files changed, 147 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h index de6cdd518cea..83ed3c158693 100644 --- a/arch/arm/mach-s3c6400/include/mach/map.h +++ b/arch/arm/mach-s3c6400/include/mach/map.h @@ -24,6 +24,14 @@ #define S3C_PA_UART3 (S3C_PA_UART + 0xC00) #define S3C_UART_OFFSET (0x400) +/* See notes on UART VA mapping in debug-macro.S */ +#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) + +#define S3C_VA_UART0 S3C_VA_UARTx(0) +#define S3C_VA_UART1 S3C_VA_UARTx(1) +#define S3C_VA_UART2 S3C_VA_UARTx(2) +#define S3C_VA_UART3 S3C_VA_UARTx(3) + #define S3C64XX_PA_SYSCON (0x7E00F000) #define S3C64XX_PA_TIMER (0x7F006000) diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c index 1e6fa5c828c9..99df9dbefa69 100644 --- a/arch/arm/plat-s3c64xx/irq.c +++ b/arch/arm/plat-s3c64xx/irq.c @@ -91,9 +91,144 @@ static struct irq_chip s3c_irq_timer = { .ack = s3c_irq_timer_ack, }; +struct uart_irq { + void __iomem *regs; + unsigned int base_irq; + unsigned int parent_irq; +}; + +/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] + * are consecutive when looking up the interrupt in the demux routines. + */ +static struct uart_irq uart_irqs[] = { + [0] = { + .regs = S3C_VA_UART0, + .base_irq = IRQ_S3CUART_BASE0, + .parent_irq = IRQ_UART0, + }, + [1] = { + .regs = S3C_VA_UART1, + .base_irq = IRQ_S3CUART_BASE1, + .parent_irq = IRQ_UART1, + }, + [2] = { + .regs = S3C_VA_UART2, + .base_irq = IRQ_S3CUART_BASE2, + .parent_irq = IRQ_UART2, + }, + [3] = { + .regs = S3C_VA_UART3, + .base_irq = IRQ_S3CUART_BASE3, + .parent_irq = IRQ_UART3, + }, +}; + +static inline void __iomem *s3c_irq_uart_base(unsigned int irq) +{ + struct uart_irq *uirq = get_irq_chip_data(irq); + return uirq->regs; +} + +static inline unsigned int s3c_irq_uart_bit(unsigned int irq) +{ + return irq & 3; +} + +/* UART interrupt registers, not worth adding to seperate include header */ +#define S3C64XX_UINTP 0x30 +#define S3C64XX_UINTSP 0x34 +#define S3C64XX_UINTM 0x38 + +static void s3c_irq_uart_mask(unsigned int irq) +{ + void __iomem *regs = s3c_irq_uart_base(irq); + unsigned int bit = s3c_irq_uart_bit(irq); + u32 reg; + + reg = __raw_readl(regs + S3C64XX_UINTM); + reg |= (1 << bit); + __raw_writel(reg, regs + S3C64XX_UINTM); +} + +static void s3c_irq_uart_maskack(unsigned int irq) +{ + void __iomem *regs = s3c_irq_uart_base(irq); + unsigned int bit = s3c_irq_uart_bit(irq); + u32 reg; + + reg = __raw_readl(regs + S3C64XX_UINTM); + reg |= (1 << bit); + __raw_writel(reg, regs + S3C64XX_UINTM); + __raw_writel(1 << bit, regs + S3C64XX_UINTP); +} + +static void s3c_irq_uart_unmask(unsigned int irq) +{ + void __iomem *regs = s3c_irq_uart_base(irq); + unsigned int bit = s3c_irq_uart_bit(irq); + u32 reg; + + reg = __raw_readl(regs + S3C64XX_UINTM); + reg &= ~(1 << bit); + __raw_writel(reg, regs + S3C64XX_UINTM); +} + +static void s3c_irq_uart_ack(unsigned int irq) +{ + void __iomem *regs = s3c_irq_uart_base(irq); + unsigned int bit = s3c_irq_uart_bit(irq); + + __raw_writel(1 << bit, regs + S3C64XX_UINTP); +} + +static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc) +{ + struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0]; + u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP); + int base = uirq->base_irq; + + if (pend & (1 << 0)) + generic_handle_irq(base); + if (pend & (1 << 1)) + generic_handle_irq(base + 1); + if (pend & (1 << 2)) + generic_handle_irq(base + 2); + if (pend & (1 << 3)) + generic_handle_irq(base + 3); +} + +static struct irq_chip s3c_irq_uart = { + .name = "s3c-uart", + .mask = s3c_irq_uart_mask, + .unmask = s3c_irq_uart_unmask, + .mask_ack = s3c_irq_uart_maskack, + .ack = s3c_irq_uart_ack, +}; + +static void __init s3c64xx_uart_irq(struct uart_irq *uirq) +{ + void *reg_base = uirq->regs; + unsigned int irq; + int offs; + + /* mask all interrupts at the start. */ + __raw_writel(0xf, reg_base + S3C64XX_UINTM); + + for (offs = 0; offs < 3; offs++) { + irq = uirq->base_irq + offs; + + set_irq_chip(irq, &s3c_irq_uart); + set_irq_chip_data(irq, uirq); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } + + set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); +} + void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) { - int irq; + int uart, irq; printk(KERN_INFO "%s: initialising interrupts\n", __func__); @@ -114,6 +249,9 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } + + for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++) + s3c64xx_uart_irq(&uart_irqs[uart]); } -- cgit v1.2.3 From 94df868b884d673c294e39a11acdfebf2bfcd67b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:07:07 +0100 Subject: [ARM] S3C64XX: Map GPIO block Add mapping for GPIO block in the static mappings. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/map.h | 4 ++++ arch/arm/plat-s3c64xx/cpu.c | 5 +++++ 2 files changed, 9 insertions(+) (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h index 83ed3c158693..618f09d637b2 100644 --- a/arch/arm/mach-s3c6400/include/mach/map.h +++ b/arch/arm/mach-s3c6400/include/mach/map.h @@ -35,6 +35,10 @@ #define S3C64XX_PA_SYSCON (0x7E00F000) #define S3C64XX_PA_TIMER (0x7F006000) +#define S3C64XX_PA_GPIO (0x7F008000) +#define S3C64XX_VA_GPIO S3C_ADDR(0x00500000) +#define S3C64XX_SZ_GPIO SZ_4K + #define S3C64XX_PA_SDRAM (0x50000000) #define S3C64XX_PA_VIC0 (0x71200000) #define S3C64XX_PA_VIC1 (0x71300000) diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c index 2559d6afc317..0bbc0e2dc5d4 100644 --- a/arch/arm/plat-s3c64xx/cpu.c +++ b/arch/arm/plat-s3c64xx/cpu.c @@ -92,6 +92,11 @@ static struct map_desc s3c_iodesc[] __initdata = { .pfn = __phys_to_pfn(S3C_PA_TIMER), .length = SZ_16K, .type = MT_DEVICE, + }, { + .virtual = S3C64XX_VA_GPIO, + .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), + .length = SZ_4K, + .type = MT_DEVICE, }, }; -- cgit v1.2.3 From b09bcdd4c2f52b54115895c4d62ad82918f71431 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 21 Nov 2008 10:36:03 +0000 Subject: [ARM] S3C64XX: Update TCFG for new timer divider settings. The S3C64XX series has a new TCFG divider setting to allow the clock directly through, which means that we need to update the pwm-clock code to cope with this. Add containing the specific code to deal with the TCFG divider settings and provide any other per-arch data that the pwm-clock driver needs to function. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/pwm-clock.h | 56 ++++++++++++++++++++++++++ arch/arm/plat-s3c/include/plat/regs-timer.h | 8 ++++ arch/arm/plat-s3c/pwm-clock.c | 39 +++++------------- arch/arm/plat-s3c24xx/include/mach/pwm-clock.h | 55 +++++++++++++++++++++++++ 4 files changed, 129 insertions(+), 29 deletions(-) create mode 100644 arch/arm/mach-s3c6400/include/mach/pwm-clock.h create mode 100644 arch/arm/plat-s3c24xx/include/mach/pwm-clock.h (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h new file mode 100644 index 000000000000..b25bedee0d52 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h @@ -0,0 +1,56 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C64xx - pwm clock and timer support + */ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @tcfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg >= S3C64XX_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << tcfg1; +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 1; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div); +} + +#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h index 086ce2685836..d097d92f8cc7 100644 --- a/arch/arm/plat-s3c/include/plat/regs-timer.h +++ b/arch/arm/plat-s3c/include/plat/regs-timer.h @@ -73,6 +73,14 @@ #define S3C2410_TCFG1_MUX_TCLK (4<<0) #define S3C2410_TCFG1_MUX_MASK (15<<0) +#define S3C64XX_TCFG1_MUX_DIV1 (0<<0) +#define S3C64XX_TCFG1_MUX_DIV2 (1<<0) +#define S3C64XX_TCFG1_MUX_DIV4 (2<<0) +#define S3C64XX_TCFG1_MUX_DIV8 (3<<0) +#define S3C64XX_TCFG1_MUX_DIV16 (4<<0) +#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */ +#define S3C64XX_TCFG1_MUX_MASK (15<<0) + #define S3C2410_TCFG1_SHIFT(x) ((x) * 4) /* for each timer, we have an count buffer, an compare buffer and diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-s3c/pwm-clock.c index 5242fb0afcca..988c0cd7ade2 100644 --- a/arch/arm/plat-s3c/pwm-clock.c +++ b/arch/arm/plat-s3c/pwm-clock.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -26,6 +27,7 @@ #include #include +#include /* Each of the timers 0 through 5 go through the following * clock tree, with the inputs depending on the timers. @@ -166,11 +168,6 @@ static inline struct pwm_tdiv_clk *to_tdiv(struct clk *clk) return container_of(clk, struct pwm_tdiv_clk, clk); } -static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) -{ - return 1 << (1 + tcfg1); -} - static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk) { unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1); @@ -179,7 +176,7 @@ static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk) tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id); tcfg1 &= S3C2410_TCFG1_MUX_MASK; - if (tcfg1 == S3C2410_TCFG1_MUX_TCLK) + if (pwm_cfg_src_is_tclk(tcfg1)) divisor = to_tdiv(clk)->divisor; else divisor = tcfg_to_divisor(tcfg1); @@ -196,7 +193,9 @@ static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk, parent_rate = clk_get_rate(clk->parent); divisor = parent_rate / rate; - if (divisor <= 2) + if (divisor <= 1 && pwm_tdiv_has_div1()) + divisor = 1; + else if (divisor <= 2) divisor = 2; else if (divisor <= 4) divisor = 4; @@ -210,25 +209,7 @@ static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk, static unsigned long clk_pwm_tdiv_bits(struct pwm_tdiv_clk *divclk) { - unsigned long bits; - - switch (divclk->divisor) { - case 2: - bits = S3C2410_TCFG1_MUX_DIV2; - break; - case 4: - bits = S3C2410_TCFG1_MUX_DIV4; - break; - case 8: - bits = S3C2410_TCFG1_MUX_DIV8; - break; - case 16: - default: - bits = S3C2410_TCFG1_MUX_DIV16; - break; - } - - return bits; + return pwm_tdiv_div_bits(divclk->divisor); } static void clk_pwm_tdiv_update(struct pwm_tdiv_clk *divclk) @@ -269,7 +250,7 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate) /* Update the current MUX settings if we are currently * selected as the clock source for this clock. */ - if (tcfg1 != S3C2410_TCFG1_MUX_TCLK) + if (!pwm_cfg_src_is_tclk(tcfg1)) clk_pwm_tdiv_update(divclk); return 0; @@ -356,7 +337,7 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent) unsigned long shift = S3C2410_TCFG1_SHIFT(id); if (parent == s3c24xx_pwmclk_tclk(id)) - bits = S3C2410_TCFG1_MUX_TCLK << shift; + bits = S3C_TCFG1_MUX_TCLK << shift; else if (parent == s3c24xx_pwmclk_tdiv(id)) bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; else @@ -418,7 +399,7 @@ static __init int clk_pwm_tin_register(struct clk *pwm) tcfg1 >>= S3C2410_TCFG1_SHIFT(id); tcfg1 &= S3C2410_TCFG1_MUX_MASK; - if (tcfg1 == S3C2410_TCFG1_MUX_TCLK) + if (pwm_cfg_src_is_tclk(tcfg1)) parent = s3c24xx_pwmclk_tclk(id); else parent = s3c24xx_pwmclk_tdiv(id); diff --git a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h new file mode 100644 index 000000000000..a087de21bc20 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h @@ -0,0 +1,55 @@ +/* linux/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C24xx - pwm clock and timer support + */ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @cfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg == S3C2410_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << (1 + tcfg1); +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 0; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div) - 1; +} + +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK -- cgit v1.2.3 From e4ea803ab0fcf985c2a2d24bc905a3cf9138e251 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Tue, 25 Nov 2008 16:59:54 +0900 Subject: [ARM] S3C64XX: Show uncompress messages Fix the initialisation of the fifo data in the uncompression serial routines to ensure that if the FIFO is enabled, that the serial output is not corrupted. Signed-off-by: Kyungmin Park [ben-linux@fluff.org: edit description to add more detail] Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6400/include/mach/uncompress.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-s3c6400') diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c6400/include/mach/uncompress.h index cc822c57cc1c..c6a82a20bf2a 100644 --- a/arch/arm/mach-s3c6400/include/mach/uncompress.h +++ b/arch/arm/mach-s3c6400/include/mach/uncompress.h @@ -21,6 +21,8 @@ static void arch_detect_cpu(void) { /* we do not need to do any cpu detection here at the moment. */ + fifo_mask = S3C2440_UFSTAT_TXMASK; + fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; } #endif /* __ASM_ARCH_UNCOMPRESS_H */ -- cgit v1.2.3