From 973efbc6a061488f280ac1792200e48eb0b1ff5e Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Wed, 5 Dec 2018 10:24:36 +0100 Subject: arm64: dts: allwinner: h5: Add system-control node with SRAM C1 Add the H5-specific system control node description to its device-tree with support for the SRAM C1 section, that will be used by the video codec node later on. The CPU-side SRAM address was obtained empirically while the size was taken from the documentation. They may not be entirely accurate. Signed-off-by: Paul Kocialkowski Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index b41dc1aab67d..f184d8f55c8a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -94,6 +94,28 @@ }; soc { + system-control@1c00000 { + compatible = "allwinner,sun50i-h5-system-control"; + reg = <0x01c00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c1: sram@18000 { + compatible = "mmio-sram"; + reg = <0x00018000 0x1c000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00018000 0x1c000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun50i-h5-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x1c000>; + }; + }; + }; + mali: gpu@1e80000 { compatible = "allwinner,sun50i-h5-mali", "arm,mali-450"; reg = <0x01e80000 0x30000>; -- cgit v1.2.3 From 24a1be4e7e80fc7a19290be4715191b77fe80b41 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Wed, 5 Dec 2018 10:24:37 +0100 Subject: ARM/arm64: dts: allwinner: Move H3/H5 syscon label over to soc-specific nodes The EMAC driver requires a syscon node to access the EMAC clock configuration register (that is part of the system-control register range and controlled). For this purpose, a dummy syscon node was introduced to let the driver access the register freely. Recently, the EMAC driver was tuned to get access to the register when the SRAM driver is registered (as used on the A64). As a result, it is no longer necessary to have a dummy syscon node for that purpose. Now that we have a proper system-control node for both the H3 and H5, we can get rid of that dummy syscon node and have the EMAC driver use the node corresponding to the proper SRAM driver (by switching the syscon label over to each dtsi). This way, we no longer have two separate nodes for the same register space. Signed-off-by: Paul Kocialkowski Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ------ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 2 +- 3 files changed, 2 insertions(+), 8 deletions(-) (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi') diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 45242df7425b..e93c4716512e 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -134,7 +134,7 @@ }; soc { - system-control@1c00000 { + syscon: system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control"; reg = <0x01c00000 0x1000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 0d9e9eac518c..ed5846982685 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -152,12 +152,6 @@ }; }; - syscon: syscon@1c00000 { - compatible = "allwinner,sun8i-h3-system-controller", - "syscon"; - reg = <0x01c00000 0x1000>; - }; - dma: dma-controller@1c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index f184d8f55c8a..107607baaa42 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -94,7 +94,7 @@ }; soc { - system-control@1c00000 { + syscon: system-control@1c00000 { compatible = "allwinner,sun50i-h5-system-control"; reg = <0x01c00000 0x1000>; #address-cells = <1>; -- cgit v1.2.3 From 8be5b161bb3d07bc5a119dfe0285ec05d28202c9 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Wed, 5 Dec 2018 10:24:43 +0100 Subject: arm64: dts: allwinner: h5: Add Video Engine node This adds the Video Engine node for the H5. Since it can map the whole DRAM range, there is no particular need for a reserved memory node (unlike platforms preceding the A33). Signed-off-by: Paul Kocialkowski Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index 107607baaa42..b45c449e6e75 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -116,6 +116,17 @@ }; }; + video-codec@1c0e000 { + compatible = "allwinner,sun50i-h5-video-engine"; + reg = <0x01c0e000 0x1000>; + clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_VE>; + interrupts = ; + allwinner,sram = <&ve_sram 1>; + }; + mali: gpu@1e80000 { compatible = "allwinner,sun50i-h5-mali", "arm,mali-450"; reg = <0x01e80000 0x30000>; -- cgit v1.2.3