From 565f4d00cde3e2e7c84fc81eb72f220eb048fcf1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 13 Dec 2023 17:28:53 +0100 Subject: arm64: dts: qcom: sm8450: move Soundwire pinctrl to its nodes Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20231213162856.188566-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'arch/arm64/boot/dts/qcom/sm8450.dtsi') diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9223834021e1..43e43837fc11 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2362,8 +2362,6 @@ #clock-cells = <0>; clock-output-names = "wsa2-mclk"; - pinctrl-names = "default"; - pinctrl-0 = <&wsa2_swr_active>; #sound-dai-cells = <1>; }; @@ -2375,6 +2373,9 @@ clock-names = "iface"; label = "WSA2"; + pinctrl-0 = <&wsa2_swr_active>; + pinctrl-names = "default"; + qcom,din-ports = <2>; qcom,dout-ports = <6>; @@ -2410,8 +2411,6 @@ #clock-cells = <0>; clock-output-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <&rx_swr_active>; #sound-dai-cells = <1>; }; @@ -2425,6 +2424,9 @@ qcom,din-ports = <0>; qcom,dout-ports = <5>; + pinctrl-0 = <&rx_swr_active>; + pinctrl-names = "default"; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; @@ -2456,8 +2458,6 @@ #clock-cells = <0>; clock-output-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <&tx_swr_active>; #sound-dai-cells = <1>; }; @@ -2477,8 +2477,6 @@ #clock-cells = <0>; clock-output-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <&wsa_swr_active>; #sound-dai-cells = <1>; }; @@ -2490,6 +2488,9 @@ clock-names = "iface"; label = "WSA"; + pinctrl-0 = <&wsa_swr_active>; + pinctrl-names = "default"; + qcom,din-ports = <2>; qcom,dout-ports = <6>; @@ -2520,6 +2521,9 @@ clock-names = "iface"; label = "TX"; + pinctrl-0 = <&tx_swr_active>; + pinctrl-names = "default"; + qcom,din-ports = <4>; qcom,dout-ports = <0>; qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; -- cgit v1.2.3