From 86543bc6eec499f7fd12e1628a29838aa90c288a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 23 Nov 2022 12:44:43 +0200 Subject: arm64: dts: qcom: use UFS symbol clocks provided by PHY Remove manually created symbol clocks and replace them with clocks provided by PHY. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221123104443.3415267-5-dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts/qcom/sm8450.dtsi') diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 5ba65780166e..a196ca861894 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -743,11 +743,21 @@ clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, <&pcie0_lane>, - <&pcie1_lane>; + <&pcie1_lane>, + <0>, + <&ufs_mem_phy_lanes 0>, + <&ufs_mem_phy_lanes 1>, + <&ufs_mem_phy_lanes 2>, + <0>; clock-names = "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", - "pcie_1_pipe_clk"; + "pcie_1_pipe_clk", + "pcie_1_phy_aux_clk", + "ufs_phy_rx_symbol_0_clk", + "ufs_phy_rx_symbol_1_clk", + "ufs_phy_tx_symbol_0_clk", + "usb3_phy_wrapper_gcc_usb30_pipe_clk"; }; gpi_dma2: dma-controller@800000 { @@ -4049,6 +4059,7 @@ <0 0x01d87c00 0 0x200>, <0 0x01d87800 0 0x188>, <0 0x01d87a00 0 0x200>; + #clock-cells = <1>; #phy-cells = <0>; }; }; -- cgit v1.2.3