From 1b63a1b480c27764d30a0924a4982d31e15df6fd Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 24 Jan 2024 12:36:56 -0600 Subject: arm64: dts: ti: k3-j7200: Enable PCIe nodes at the board level PCIe node defined in the top-level J7200 SoC dtsi file is incomplete and will not be functional unless it is extended with a SerDes PHY. As the PHY and mode is only known at the board integration level, this node should only be enabled when provided with this information. Disable the PCIe node in the dtsi files and only enable when it is actually pinned out on a given board. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240124183659.149119-1-afd@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts/ti/k3-j7200-main.dtsi') diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index da67bf8fe703..1e2434caa7ff 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -770,6 +770,7 @@ ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>, <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>; dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; + status = "disabled"; }; pcie1_ep: pcie-ep@2910000 { -- cgit v1.2.3