From cd40be983803830da19cb492b250abccf71ace7d Mon Sep 17 00:00:00 2001 From: Elad Nachman Date: Wed, 3 Jan 2024 19:28:03 +0200 Subject: arm64: dts: ac5: add mmc node and clock Add mmc and mmc clock nodes to ac5 and ac5x device tree files Signed-off-by: Elad Nachman Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 31 ++++++++++++++++++++++++- arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts | 4 ++++ 2 files changed, 34 insertions(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index b5e042b8e929..5591939e057b 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -77,7 +77,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - dma-ranges; internal-regs@7f000000 { #address-cells = <1>; @@ -204,6 +203,30 @@ }; }; + mmc_dma: bus@80500000 { + compatible = "simple-bus"; + ranges; + #address-cells = <0x2>; + #size-cells = <0x2>; + reg = <0x0 0x80500000 0x0 0x100000>; + dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>; + dma-coherent; + + sdhci: mmc@805c0000 { + compatible = "marvell,ac5-sdhci", + "marvell,armada-ap806-sdhci"; + reg = <0x0 0x805c0000 0x0 0x1000>; + interrupts = ; + clocks = <&emmc_clock>, <&cnm_clock>; + clock-names = "core", "axi"; + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + }; + }; + /* * Dedicated section for devices behind 32bit controllers so we * can configure specific DMA mapping for them @@ -335,5 +358,11 @@ #clock-cells = <0>; clock-frequency = <400000000>; }; + + emmc_clock: emmc-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; }; }; diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts b/arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts index f0ebdb84eec9..0c973d7a215a 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts +++ b/arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts @@ -99,3 +99,7 @@ }; }; }; + +&sdhci { + status = "okay"; +}; -- cgit v1.2.3 From ec55a22149d64f9ac41845d923b884d4a666bf4d Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Tue, 23 Jan 2024 13:22:58 +0100 Subject: arm64: dts: marvell: reorder crypto interrupts on Armada SoCs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Match order specified in binding documentation. It says "mem" should be the last interrupt. This fixes: arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:0: 'ring0' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:1: 'ring1' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:2: 'ring2' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:3: 'ring3' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:4: 'eip' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:5: 'mem' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# Signed-off-by: Rafał Miłecki Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 +++++----- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index e300145ad1a6..1cc3fa1c354d 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -431,14 +431,14 @@ crypto: crypto@90000 { compatible = "inside-secure,safexcel-eip97ies"; reg = <0x90000 0x20000>; - interrupts = , - , + interrupts = , , , , - ; - interrupt-names = "mem", "ring0", "ring1", - "ring2", "ring3", "eip"; + , + ; + interrupt-names = "ring0", "ring1", "ring2", + "ring3", "eip", "mem"; clocks = <&nb_periph_clk 15>; }; diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index 4ec1aae0a3a9..7e595ac80043 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -511,14 +511,14 @@ CP11X_LABEL(crypto): crypto@800000 { compatible = "inside-secure,safexcel-eip197b"; reg = <0x800000 0x200000>; - interrupts = <87 IRQ_TYPE_LEVEL_HIGH>, - <88 IRQ_TYPE_LEVEL_HIGH>, + interrupts = <88 IRQ_TYPE_LEVEL_HIGH>, <89 IRQ_TYPE_LEVEL_HIGH>, <90 IRQ_TYPE_LEVEL_HIGH>, <91 IRQ_TYPE_LEVEL_HIGH>, - <92 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mem", "ring0", "ring1", - "ring2", "ring3", "eip"; + <92 IRQ_TYPE_LEVEL_HIGH>, + <87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ring0", "ring1", "ring2", "ring3", + "eip", "mem"; clock-names = "core", "reg"; clocks = <&CP11X_LABEL(clk) 1 26>, <&CP11X_LABEL(clk) 1 17>; -- cgit v1.2.3 From ecd815b862ddf3637275a09ba274a843b9a4d7e0 Mon Sep 17 00:00:00 2001 From: Alex Leibovich Date: Thu, 8 Feb 2024 09:14:13 +0100 Subject: arm64: dts: armada-ap807: update thermal compatible Use the correct thermal coefficients for the Armada AP807 dies. Signed-off-by: Alex Leibovich Reviewed-by: Stefan Chulski Tested-by: Stefan Chulski Signed-off-by: Russell King (Oracle) Signed-off-by: Stefan Eichenberger Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-ap807.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/marvell/armada-ap807.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi index 4a23f65d475f..a3328d05fc94 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap807.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi @@ -33,3 +33,6 @@ "marvell,armada-ap806-sdhci"; /* Backward compatibility */ }; +&ap_thermal { + compatible = "marvell,armada-ap807-thermal"; +}; -- cgit v1.2.3