From 562dc4c9c2c1662bcfedf7026860ff306c969d70 Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Fri, 13 May 2022 03:33:40 +0800 Subject: MIPS: Ingenic: Refresh device tree for Ingenic SoCs and boards. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 1.Add SSI nodes for X1000 SoC and X1830 SoC from Ingenic. 2.Refresh SSI related nodes in CU1000-Neo and CU1830-Neo. 3.The X1830 SoC used by the CU1830-Neo and the X1000 SoC used by the CU1000-Neo are both single-core processors, therefore the "OST_CLK_PERCPU_TIMER" ABI should not be used in the OST nodes of the CU1830-Neo and CU1000-Neo, it is just a coincidence that there is no problem now. So replace the misused "OST_CLK_PERCPU_TIMER" ABI with the correct "OST_CLK_EVENT_TIMER" ABI. Signed-off-by: 周琰杰 (Zhou Yanjie) Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/x1000.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/mips/boot/dts/ingenic/x1000.dtsi') diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index 18c789c5f6be..ecbfed49dc77 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -258,6 +258,25 @@ status = "disabled"; }; + ssi: spi@10043000 { + compatible = "ingenic,x1000-spi"; + reg = <0x10043000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <8>; + + clocks = <&cgu X1000_CLK_SSI>; + clock-names = "spi"; + + dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>, + <&pdma X1000_DMA_SSI0_TX 0xffffffff>; + dma-names = "rx", "tx"; + + status = "disabled"; + }; + i2c0: i2c-controller@10050000 { compatible = "ingenic,x1000-i2c"; reg = <0x10050000 0x1000>; @@ -303,6 +322,7 @@ pdma: dma-controller@13420000 { compatible = "ingenic,x1000-dma"; reg = <0x13420000 0x400>, <0x13421000 0x40>; + #dma-cells = <2>; interrupt-parent = <&intc>; -- cgit v1.2.3