From 1ce7587e507e1762df1dadc22affcd41376040d5 Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Tue, 30 Jan 2024 09:50:32 +0800 Subject: riscv: dts: add reset generator for Sophgo SG2042 SoC Add reset generator node to device tree for SG2042. Signed-off-by: Chen Wang Reviewed-by: Inochi Amaoto Link: https://lore.kernel.org/r/b2f5d7cd2d3fccfc00cf4563d2dd7363b0fa2fca.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/riscv/boot') diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index ead1cc35d88b..eeb341e16bfd 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + #include "sg2042-cpus.dtsi" / { @@ -327,6 +329,12 @@ riscv,ndev = <224>; }; + rstgen: reset-controller@7030013000 { + compatible = "sophgo,sg2042-reset"; + reg = <0x00000070 0x30013000 0x00000000 0x0000000c>; + #reset-cells = <1>; + }; + uart0: serial@7040000000 { compatible = "snps,dw-apb-uart"; reg = <0x00000070 0x40000000 0x00000000 0x00001000>; -- cgit v1.2.3 From 08573ba006ab7bc29c183e0b3c362a0b34f1d87b Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Tue, 30 Jan 2024 09:50:51 +0800 Subject: riscv: dts: add resets property for uart node Add resets property for uart0 for completeness, although it is deasserted by default. Signed-off-by: Chen Wang Reviewed-by: Inochi Amaoto Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/riscv/boot') diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index eeb341e16bfd..81fda312f988 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -343,6 +343,7 @@ clock-frequency = <500000000>; reg-shift = <2>; reg-io-width = <4>; + resets = <&rstgen RST_UART0>; status = "disabled"; }; }; -- cgit v1.2.3