From b4cbe606dc3674b25cb661e7cd1a1c6ddaaafaaa Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 25 Oct 2021 12:10:37 +0900 Subject: clk: visconti: Add support common clock driver and reset driver Add support for common interface of the common clock and reset driver for Toshiba Visconti5 and its SoC, TMPV7708. The PIPLLCT provides the PLL, and the PISMU provides clock and reset functionality. Each drivers are provided in this patch. Signed-off-by: Nobuhiro Iwamatsu Link: https://lore.kernel.org/r/20211025031038.4180686-4-nobuhiro1.iwamatsu@toshiba.co.jp [sboyd@kernel.org: Add bitfield.h include to pll.c] Signed-off-by: Stephen Boyd --- drivers/clk/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/Kconfig') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index c5b3dc97396a..5fb34467f404 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -417,6 +417,7 @@ source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" +source "drivers/clk/visconti/Kconfig" source "drivers/clk/x86/Kconfig" source "drivers/clk/xilinx/Kconfig" source "drivers/clk/zynqmp/Kconfig" -- cgit v1.2.3