From e9f92b9999055110249dacdc5f1a6dfda2a155f6 Mon Sep 17 00:00:00 2001 From: Harini Katakam Date: Thu, 16 Mar 2023 15:03:18 +0530 Subject: dmaengine: zynqmp_dma: Sync DMA and coherent masks Align ZDMA DMA as well as coherent memory masks to 44 bit. This is required when using >32 bit memory regions. Signed-off-by: Harini Katakam Acked-by: Michal Simek Link: https://lore.kernel.org/r/20230316093318.6722-1-harini.katakam@amd.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/zynqmp_dma.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers/dma') diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c index ce359058c638..9360f43b8e0f 100644 --- a/drivers/dma/xilinx/zynqmp_dma.c +++ b/drivers/dma/xilinx/zynqmp_dma.c @@ -1060,7 +1060,11 @@ static int zynqmp_dma_probe(struct platform_device *pdev) zdev->dev = &pdev->dev; INIT_LIST_HEAD(&zdev->common.channels); - dma_set_mask(&pdev->dev, DMA_BIT_MASK(44)); + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); + if (ret) { + dev_err(&pdev->dev, "DMA not available for address range\n"); + return ret; + } dma_cap_set(DMA_MEMCPY, zdev->common.cap_mask); p = &zdev->common; -- cgit v1.2.3