From 3bd2706c910fd328e4ab96ae0aabdcd7c4a90fbf Mon Sep 17 00:00:00 2001 From: Sai Krishna Potthuri Date: Wed, 4 Jan 2023 14:15:12 +0530 Subject: EDAC/zynqmp: Add EDAC support for Xilinx ZynqMP OCM Add EDAC support for Xilinx ZynqMP OCM Controller, so this driver reports CE and UE errors upon interrupt generation. Also add debugfs files for error injection. On Xilinx ZynqMP platform, both OCM Controller driver(zynqmp_edac) and DDR Memory Controller driver(synopsys_edac) co-exist which means both can be loaded at a time. This scenario is tested on Xilinx ZynqMP platform. Fix following issue reported by the robot: "MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml" [ bp: - Massage commit message - s/EDAC_ZYNQMP_OCM/EDAC_ZYNQMP/ - Touchups ] Reported-by: kernel test robot Co-developed-by: Shubhrajyoti Datta Signed-off-by: Shubhrajyoti Datta Signed-off-by: Sai Krishna Potthuri Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20230104084512.1855243-3-sai.krishna.potthuri@amd.com --- drivers/edac/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/edac/Kconfig') diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 4cfdefbd744d..68f576700911 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -542,4 +542,12 @@ config EDAC_DMC520 Support for error detection and correction on the SoCs with ARM DMC-520 DRAM controller. +config EDAC_ZYNQMP + tristate "Xilinx ZynqMP OCM Controller" + depends on ARCH_ZYNQMP || COMPILE_TEST + help + This driver supports error detection and correction for the + Xilinx ZynqMP OCM (On Chip Memory) controller. It can also be + built as a module. In that case it will be called zynqmp_edac. + endif # EDAC -- cgit v1.2.3