From 66ab57574f2c8233550f641ecdc34fd0ef61341d Mon Sep 17 00:00:00 2001 From: Gerald Loacker Date: Thu, 2 Mar 2023 13:39:49 +0100 Subject: drm/rockchip: vop2: add polarity flags to RGB output Use h/v-sync and pixel clock polarity flags for RGB output. For all other outputs this is already implemented. Signed-off-by: Gerald Loacker Signed-off-by: Heiko Stuebner Link: https://patchwork.freedesktop.org/patch/msgid/20230302123949.957998-1-gerald.loacker@wolfvision.net --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 3e5861653b69..03ca32cd2050 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1438,6 +1438,8 @@ static void rk3568_set_intf_mux(struct vop2_video_port *vp, int id, die &= ~RK3568_SYS_DSP_INFACE_EN_RGB_MUX; die |= RK3568_SYS_DSP_INFACE_EN_RGB | FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_RGB_MUX, vp->id); + dip &= ~RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL; + dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags); if (polflags & POLFLAG_DCLK_INV) regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16) | BIT(3)); else -- cgit v1.2.3