From 091d62831793c3a1be6ae46aa888e7551e0818ad Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 18 Apr 2019 17:10:12 -0700 Subject: drm/v3d: Set the correct DMA mask according to the MMU's limits. On 7278, we've got 40 bits to work with. Signed-off-by: Eric Anholt Link: https://patchwork.freedesktop.org/patch/msgid/20190419001014.23579-2-eric@anholt.net Reviewed-by: Paul Kocialkowski --- drivers/gpu/drm/v3d/v3d_regs.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/drm/v3d/v3d_regs.h') diff --git a/drivers/gpu/drm/v3d/v3d_regs.h b/drivers/gpu/drm/v3d/v3d_regs.h index 9a8ff0ce648e..54c8c4320da0 100644 --- a/drivers/gpu/drm/v3d/v3d_regs.h +++ b/drivers/gpu/drm/v3d/v3d_regs.h @@ -191,6 +191,14 @@ /* Address that faulted */ #define V3D_MMU_VIO_ADDR 0x01234 +#define V3D_MMU_DEBUG_INFO 0x01238 +# define V3D_MMU_PA_WIDTH_MASK V3D_MASK(11, 8) +# define V3D_MMU_PA_WIDTH_SHIFT 8 +# define V3D_MMU_VA_WIDTH_MASK V3D_MASK(7, 4) +# define V3D_MMU_VA_WIDTH_SHIFT 4 +# define V3D_MMU_VERSION_MASK V3D_MASK(3, 0) +# define V3D_MMU_VERSION_SHIFT 0 + /* Per-V3D-core registers */ #define V3D_CTL_IDENT0 0x00000 -- cgit v1.2.3