From 58e19acf0cdf3f18c1c868165f45d3ea626b9c3f Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Wed, 12 Apr 2023 16:28:41 -0700 Subject: drm/xe: Cleanup page-related defines Rename the following defines to lose the GEN* prefixes since they don't make sense for xe: GEN8_PTE_SHIFT -> XE_PTE_SHIFT GEN8_PAGE_SIZE -> XE_PAGE_SIZE GEN8_PTE_MASK -> XE_PTE_MASK GEN8_PDE_SHIFT -> XE_PDE_SHIFT GEN8_PDES -> XE_PDES GEN8_PDE_MASK -> XE_PDE_MASK GEN8_64K_PTE_SHIFT -> XE_64K_PTE_SHIFT GEN8_64K_PAGE_SIZE -> XE_64K_PAGE_SIZE GEN8_64K_PTE_MASK -> XE_64K_PTE_MASK GEN8_64K_PDE_MASK -> XE_64K_PDE_MASK GEN8_PDE_PS_2M -> XE_PDE_PS_2M GEN8_PDPE_PS_1G -> XE_PDPE_PS_1G GEN8_PDE_IPS_64K -> XE_PDE_IPS_64K GEN12_GGTT_PTE_LM -> XE_GGTT_PTE_LM GEN12_USM_PPGTT_PTE_AE -> XE_USM_PPGTT_PTE_AE GEN12_PPGTT_PTE_LM -> XE_PPGTT_PTE_LM GEN12_PDE_64K -> XE_PDE_64K GEN12_PTE_PS64 -> XE_PTE_PS64 GEN8_PAGE_PRESENT -> XE_PAGE_PRESENT GEN8_PAGE_RW -> XE_PAGE_RW PTE_READ_ONLY -> XE_PTE_READ_ONLY Keep an XE_ prefix to make sure we don't mix the defines for the CPU (e.g. PAGE_SIZE) with the ones fro the GPU). Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_ggtt.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'drivers/gpu/drm/xe/xe_ggtt.c') diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c index 0fda9a18049b..dbc45ef084b4 100644 --- a/drivers/gpu/drm/xe/xe_ggtt.c +++ b/drivers/gpu/drm/xe/xe_ggtt.c @@ -30,11 +30,11 @@ u64 xe_ggtt_pte_encode(struct xe_bo *bo, u64 bo_offset) u64 pte; bool is_vram; - pte = xe_bo_addr(bo, bo_offset, GEN8_PAGE_SIZE, &is_vram); - pte |= GEN8_PAGE_PRESENT; + pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE, &is_vram); + pte |= XE_PAGE_PRESENT; if (is_vram) - pte |= GEN12_GGTT_PTE_LM; + pte |= XE_GGTT_PTE_LM; /* FIXME: vfunc + pass in caching rules */ if (xe->info.platform == XE_METEORLAKE) { @@ -56,10 +56,10 @@ static unsigned int probe_gsm_size(struct pci_dev *pdev) void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte) { - XE_BUG_ON(addr & GEN8_PTE_MASK); + XE_BUG_ON(addr & XE_PTE_MASK); XE_BUG_ON(addr >= ggtt->size); - writeq(pte, &ggtt->gsm[addr >> GEN8_PTE_SHIFT]); + writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]); } static void xe_ggtt_clear(struct xe_ggtt *ggtt, u64 start, u64 size) @@ -76,7 +76,7 @@ static void xe_ggtt_clear(struct xe_ggtt *ggtt, u64 start, u64 size) while (start < end) { xe_ggtt_set_pte(ggtt, start, scratch_pte); - start += GEN8_PAGE_SIZE; + start += XE_PAGE_SIZE; } } @@ -107,7 +107,7 @@ int xe_ggtt_init_noalloc(struct xe_gt *gt, struct xe_ggtt *ggtt) } ggtt->gsm = gt->mmio.regs + SZ_8M; - ggtt->size = (gsm_size / 8) * (u64)GEN8_PAGE_SIZE; + ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE; if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ggtt->flags |= XE_GGTT_FLAGS_64K; @@ -167,7 +167,7 @@ int xe_ggtt_init(struct xe_gt *gt, struct xe_ggtt *ggtt) else flags |= XE_BO_CREATE_VRAM_IF_DGFX(gt); - ggtt->scratch = xe_bo_create_pin_map(xe, gt, NULL, GEN8_PAGE_SIZE, + ggtt->scratch = xe_bo_create_pin_map(xe, gt, NULL, XE_PAGE_SIZE, ttm_bo_type_kernel, flags); @@ -224,8 +224,8 @@ void xe_ggtt_printk(struct xe_ggtt *ggtt, const char *prefix) scratch_pte = xe_ggtt_pte_encode(ggtt->scratch, 0); printk("%sGlobal GTT:", prefix); - for (addr = 0; addr < ggtt->size; addr += GEN8_PAGE_SIZE) { - unsigned int i = addr / GEN8_PAGE_SIZE; + for (addr = 0; addr < ggtt->size; addr += XE_PAGE_SIZE) { + unsigned int i = addr / XE_PAGE_SIZE; XE_BUG_ON(addr > U32_MAX); if (ggtt->gsm[i] == scratch_pte) @@ -261,7 +261,7 @@ void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_bo *bo) u64 start = bo->ggtt_node.start; u64 offset, pte; - for (offset = 0; offset < bo->size; offset += GEN8_PAGE_SIZE) { + for (offset = 0; offset < bo->size; offset += XE_PAGE_SIZE) { pte = xe_ggtt_pte_encode(bo, offset); xe_ggtt_set_pte(ggtt, start + offset, pte); } @@ -309,7 +309,7 @@ int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo) { u64 alignment; - alignment = GEN8_PAGE_SIZE; + alignment = XE_PAGE_SIZE; if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K) alignment = SZ_64K; -- cgit v1.2.3