From 27bdc37c390af01af72ad3750cafe19b459bdf93 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Mon, 19 Jun 2023 13:51:18 +0200 Subject: mmc: mmci: stm32: manage block gap hardware flow control In stm32 sdmmc variant revision v3.0, a block gap hardware flow control should be used with bus speed modes SDR104 and HS200. It is enabled by writing a non-null value to the new added register MMCI_STM32_FIFOTHRR. The threshold will be 2^(N-1) bytes, so we can use the ffs() function to compute the value N to be written to the register. The threshold used should be the data block size, but must not be bigger than the FIFO size. Signed-off-by: Yann Gautier Link: https://lore.kernel.org/r/20230619115120.64474-5-yann.gautier@foss.st.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci_stm32_sdmmc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/mmc/host/mmci_stm32_sdmmc.c') diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c index 1bc775b9e714..29634d1dc289 100644 --- a/drivers/mmc/host/mmci_stm32_sdmmc.c +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c @@ -361,6 +361,19 @@ static u32 sdmmc_get_dctrl_cfg(struct mmci_host *host) datactrl = mmci_dctrl_blksz(host); + if (host->hw_revision >= 3) { + u32 thr = 0; + + if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104 || + host->mmc->ios.timing == MMC_TIMING_MMC_HS200) { + thr = ffs(min_t(unsigned int, host->data->blksz, + host->variant->fifosize)); + thr = min_t(u32, thr, MMCI_STM32_THR_MASK); + } + + writel_relaxed(thr, host->base + MMCI_STM32_FIFOTHRR); + } + if (host->mmc->card && mmc_card_sdio(host->mmc->card) && host->data->blocks == 1) datactrl |= MCI_DPSM_STM32_MODE_SDIO; -- cgit v1.2.3