From efde4f6dd13acd22f9dfb2faaea0f8c08d4e94ad Mon Sep 17 00:00:00 2001 From: Ping-Ke Shih Date: Mon, 11 Dec 2023 16:33:36 +0800 Subject: wifi: rtw89: add XTAL SI for WiFi 7 chips The XTAL SI is a serial interface to indirectly access registers of analog hardware circuit. Since WiFi 7 chips use different registers, add a ops to access them via common functions. This patch doesn't change logic for existing chips. Signed-off-by: Ping-Ke Shih Signed-off-by: Kalle Valo Link: https://msgid.link/20231211083341.118047-2-pkshih@realtek.com --- drivers/net/wireless/realtek/rtw89/reg.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/net/wireless/realtek/rtw89/reg.h') diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 2f2ac0748ce0..eb40bfed9ed4 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -4085,6 +4085,14 @@ #define R_BE_UDM2 0x01F8 #define B_BE_UDM2_EPC_RA_MASK GENMASK(31, 0) +#define R_BE_WLAN_XTAL_SI_CTRL 0x0270 +#define B_BE_WL_XTAL_SI_CMD_POLL BIT(31) +#define B_BE_WL_XTAL_SI_CHIPID_MASK GENMASK(30, 28) +#define B_BE_WL_XTAL_SI_MODE_MASK GENMASK(25, 24) +#define B_BE_WL_XTAL_SI_BITMASK_MASK GENMASK(23, 16) +#define B_BE_WL_XTAL_SI_DATA_MASK GENMASK(15, 8) +#define B_BE_WL_XTAL_SI_ADDR_MASK GENMASK(7, 0) + #define R_BE_IC_PWR_STATE 0x03F0 #define B_BE_WHOLE_SYS_PWR_STE_MASK GENMASK(25, 16) #define MAC_AX_SYS_ACT 0x220 -- cgit v1.2.3