From 839034d8bd7f380b13b3493e057239f95bb8672a Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 22 Oct 2020 13:50:56 -0700 Subject: phy: phy-brcm-sata: Allow configuration SATA AFE TX amplitude Read the 'brcm,tx-amplitude-millivolt' property from Device Tree and propagate its value into the appropriate test transmit register to change the TX amplitude. Signed-off-by: Florian Fainelli Link: https://lore.kernel.org/r/20201022205056.233879-3-f.fainelli@gmail.com Signed-off-by: Vinod Koul --- drivers/phy/broadcom/phy-brcm-sata.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'drivers/phy/broadcom') diff --git a/drivers/phy/broadcom/phy-brcm-sata.c b/drivers/phy/broadcom/phy-brcm-sata.c index 53942973f508..3ecf41359591 100644 --- a/drivers/phy/broadcom/phy-brcm-sata.c +++ b/drivers/phy/broadcom/phy-brcm-sata.c @@ -65,6 +65,7 @@ struct brcm_sata_port { bool ssc_en; enum brcm_sata_phy_rxaeq_mode rxaeq_mode; u32 rxaeq_val; + u32 tx_amplitude_val; }; struct brcm_sata_phy { @@ -84,6 +85,10 @@ enum sata_phy_regs { BLOCK0_SPARE_OOB_CLK_SEL_MASK = 0x3, BLOCK0_SPARE_OOB_CLK_SEL_REFBY2 = 0x1, + BLOCK1_REG_BANK = 0x10, + BLOCK1_TEST_TX = 0x83, + BLOCK1_TEST_TX_AMP_SHIFT = 12, + PLL_REG_BANK_0 = 0x050, PLL_REG_BANK_0_PLLCONTROL_0 = 0x81, PLLCONTROL_0_FREQ_DET_RESTART = BIT(13), @@ -379,6 +384,29 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, ~tmp, RXPMD_MON_CORRECT_EN | value); + tmp = GENMASK(15, 12); + switch (port->tx_amplitude_val) { + case 400: + value = BIT(12) | BIT(13); + break; + case 500: + value = BIT(13); + break; + case 600: + value = BIT(12); + break; + case 800: + value = 0; + break; + default: + value = tmp; + break; + } + + if (value != tmp) + brcm_sata_phy_wr(port, BLOCK1_REG_BANK, BLOCK1_TEST_TX, ~tmp, + value); + /* Turn on/off SSC */ brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL5, ~TX_ACTRL5_SSC_EN, port->ssc_en ? TX_ACTRL5_SSC_EN : 0); @@ -787,6 +815,10 @@ static int brcm_sata_phy_probe(struct platform_device *pdev) if (port->rxaeq_mode == RXAEQ_MODE_MANUAL) of_property_read_u32(child, "brcm,rxaeq-value", &port->rxaeq_val); + + of_property_read_u32(child, "brcm,tx-amplitude-millivolt", + &port->tx_amplitude_val); + port->ssc_en = of_property_read_bool(child, "brcm,enable-ssc"); if (IS_ERR(port->phy)) { dev_err(dev, "failed to create PHY\n"); -- cgit v1.2.3