From 2f2b73a29d2aabf5ad0150856c3e5cb6e04dcfc1 Mon Sep 17 00:00:00 2001 From: Rashmi A Date: Thu, 3 Jun 2021 23:52:42 +0530 Subject: phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP Since the EMMC clock was changed from 200Mhz to 175Mhz in FIP, there were some warnings introduced, as the frequency values being checked was still wrt 200Mhz in code. Hence, the frequency checks are now updated based on the current 175Mhz EMMC clock changed in FIP. Spamming kernel log msg: "phy phy-20290000.mmc_phy.2: Unsupported rate: 43750000" Signed-off-by: Rashmi A Reviewed-by: Adrian Hunter Acked-By: Vinod Koul Link: https://lore.kernel.org/r/20210603182242.25733-3-rashmi.a@intel.com Signed-off-by: Ulf Hansson --- drivers/phy/intel/phy-intel-keembay-emmc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/phy/intel') diff --git a/drivers/phy/intel/phy-intel-keembay-emmc.c b/drivers/phy/intel/phy-intel-keembay-emmc.c index eb7c635ed89a..0eb11ac7c2e2 100644 --- a/drivers/phy/intel/phy-intel-keembay-emmc.c +++ b/drivers/phy/intel/phy-intel-keembay-emmc.c @@ -95,7 +95,8 @@ static int keembay_emmc_phy_power(struct phy *phy, bool on_off) else freqsel = 0x0; - if (mhz < 50 || mhz > 200) + /* Check for EMMC clock rate*/ + if (mhz > 175) dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); /* -- cgit v1.2.3