From d387dfc43cba91d010eeab17403e03a525e16b0f Mon Sep 17 00:00:00 2001 From: Michael Tretter Date: Thu, 21 Jan 2021 08:16:47 +0100 Subject: soc: xilinx: vcu: drop coreclk from struct xlnx_vcu The coreclk field is newer read after being written to xlnx_vcu. Remove the coreclk field from the xlnx_vcu and use a function local variable instead. Signed-off-by: Michael Tretter Acked-by: Michal Simek Link: https://lore.kernel.org/r/20210121071659.1226489-4-m.tretter@pengutronix.de Signed-off-by: Stephen Boyd --- drivers/soc/xilinx/xlnx_vcu.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/soc/xilinx') diff --git a/drivers/soc/xilinx/xlnx_vcu.c b/drivers/soc/xilinx/xlnx_vcu.c index 14daad4efc58..7da9643820a8 100644 --- a/drivers/soc/xilinx/xlnx_vcu.c +++ b/drivers/soc/xilinx/xlnx_vcu.c @@ -73,7 +73,6 @@ * @aclk: axi clock source * @logicore_reg_ba: logicore reg base address * @vcu_slcr_ba: vcu_slcr Register base address - * @coreclk: core clock frequency */ struct xvcu_device { struct device *dev; @@ -81,7 +80,6 @@ struct xvcu_device { struct clk *aclk; struct regmap *logicore_reg_ba; void __iomem *vcu_slcr_ba; - u32 coreclk; }; static struct regmap_config vcu_settings_regmap_config = { @@ -358,10 +356,10 @@ static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu) return -EINVAL; } - xvcu->coreclk = pll_clk / divisor_core; + coreclk = pll_clk / divisor_core; mcuclk = pll_clk / divisor_mcu; dev_dbg(xvcu->dev, "Actual Ref clock freq is %uHz\n", refclk); - dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", xvcu->coreclk); + dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", coreclk); dev_dbg(xvcu->dev, "Actual Mcu clock freq is %uHz\n", mcuclk); vcu_pll_ctrl &= ~(VCU_PLL_CTRL_FBDIV_MASK << VCU_PLL_CTRL_FBDIV_SHIFT); -- cgit v1.2.3