From f20387dfd065693ba7ea2788a2f893bf653c9cb8 Mon Sep 17 00:00:00 2001 From: Michael Tretter Date: Tue, 28 May 2019 13:11:19 -0400 Subject: media: allegro: add Allegro DVT video IP core driver Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device Technical Reference Manual uses the term VCU (Video Codec Unit) for the encoder, decoder and system integration block. This driver takes care of interacting with the MicroBlaze MCU that controls the actual IP cores. The IP cores and MCU are integrated in the FPGA. The xlnx_vcu driver is responsible for configuring the clocks and providing information about the codec configuration. The driver currently only supports the H.264 video encoder. Signed-off-by: Michael Tretter Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/staging/media/Kconfig') diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index f77f5eee7fc2..710b085b782f 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -20,6 +20,8 @@ menuconfig STAGING_MEDIA if STAGING_MEDIA && MEDIA_SUPPORT # Please keep them in alphabetic order +source "drivers/staging/media/allegro-dvt/Kconfig" + source "drivers/staging/media/bcm2048/Kconfig" source "drivers/staging/media/davinci_vpfe/Kconfig" -- cgit v1.2.3