From 41e1bf811ace29bdc0df15523e3dfb3233704d1b Mon Sep 17 00:00:00 2001 From: Samuil Ivanov Date: Wed, 23 Oct 2019 23:58:55 +0300 Subject: Staging: qlge: Rewrite two while loops as simple for loops This is a task from the TODO list of qlge driver: - some "while" loops could be rewritten with simple "for" The change is in functions ql_wait_reg_rdy and ql_wait_cfg in qlge_main.c. The while loops are basically count based (they decrement on each iteration), and it makes more sense to be a for loop construction instead. Signed-off-by: Samuil Ivanov Link: https://lore.kernel.org/r/20191023205855.GA1841@samuil-ThinkCentre-M92P Signed-off-by: Greg Kroah-Hartman --- drivers/staging/qlge/qlge_main.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers/staging/qlge') diff --git a/drivers/staging/qlge/qlge_main.c b/drivers/staging/qlge/qlge_main.c index 0c381d91faa6..6f6b4c06688c 100644 --- a/drivers/staging/qlge/qlge_main.c +++ b/drivers/staging/qlge/qlge_main.c @@ -167,9 +167,9 @@ void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask) int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit) { u32 temp; - int count = UDELAY_COUNT; + int count; - while (count) { + for (count = 0; count < UDELAY_COUNT; count++) { temp = ql_read32(qdev, reg); /* check for errors */ @@ -181,7 +181,6 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit) } else if (temp & bit) return 0; udelay(UDELAY_DELAY); - count--; } netif_alert(qdev, probe, qdev->ndev, "Timed out waiting for reg %x to come ready.\n", reg); @@ -193,17 +192,16 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit) */ static int ql_wait_cfg(struct ql_adapter *qdev, u32 bit) { - int count = UDELAY_COUNT; + int count; u32 temp; - while (count) { + for (count = 0; count < UDELAY_COUNT; count++) { temp = ql_read32(qdev, CFG); if (temp & CFG_LE) return -EIO; if (!(temp & bit)) return 0; udelay(UDELAY_DELAY); - count--; } return -ETIMEDOUT; } -- cgit v1.2.3