From 6e1d850acff9477ae4c18a73c19ef52841ac2010 Mon Sep 17 00:00:00 2001
From: Asutosh Das <quic_asutoshd@quicinc.com>
Date: Fri, 13 Jan 2023 12:48:38 -0800
Subject: scsi: ufs: core: Probe for EXT_IID support

Task Tag is limited to 8 bits and this restricts the number of active I/Os
to 255.  In multi-circular queue mode, this may not be enough.  The
specification provides EXT_IID which can be used to increase the number of
I/Os if the UFS device and UFSHC support it.  This patch adds support to
probe for EXT_IID support in UFS device and UFSHC.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
---
 include/ufs/ufshci.h | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'include/ufs/ufshci.h')

diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h
index 9346efea3eb3..f41bc7b03092 100644
--- a/include/ufs/ufshci.h
+++ b/include/ufs/ufshci.h
@@ -22,6 +22,7 @@ enum {
 /* UFSHCI Registers */
 enum {
 	REG_CONTROLLER_CAPABILITIES		= 0x00,
+	REG_MCQCAP				= 0x04,
 	REG_UFS_VERSION				= 0x08,
 	REG_CONTROLLER_DEV_ID			= 0x10,
 	REG_CONTROLLER_PROD_ID			= 0x14,
@@ -69,6 +70,12 @@ enum {
 	MASK_OUT_OF_ORDER_DATA_DELIVERY_SUPPORT	= 0x02000000,
 	MASK_UIC_DME_TEST_MODE_SUPPORT		= 0x04000000,
 	MASK_CRYPTO_SUPPORT			= 0x10000000,
+	MASK_MCQ_SUPPORT			= 0x40000000,
+};
+
+/* MCQ capability mask */
+enum {
+	MASK_EXT_IID_SUPPORT = 0x00000400,
 };
 
 #define UFS_MASK(mask, offset)		((mask) << (offset))
-- 
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