From bfc43a9c0ce5f3fcf98c972d7b7f21a742b7c957 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 8 Jun 2023 13:53:10 +0100 Subject: dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP The LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla Reviewed-by: Johan Hovold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org --- include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h (limited to 'include') diff --git a/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h b/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h new file mode 100644 index 000000000000..df800ea2741c --- /dev/null +++ b/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H +#define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H + +/* LPASS TCSR */ +#define LPASS_AUDIO_SWR_TX_CGCR 0 + +#endif -- cgit v1.2.3 From 83da70da40c93f3515aebcd5f2b8ff6283f64ee3 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 8 Jun 2023 13:53:11 +0100 Subject: dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla Reviewed-by: Johan Hovold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org --- .../devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 10 ++++++++++ include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h | 5 +++++ 2 files changed, 15 insertions(+) (limited to 'include') diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml index 047cae91f443..3326dcd6766c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml @@ -19,6 +19,7 @@ description: | properties: compatible: enum: + - qcom,sc8280xp-lpassaudiocc - qcom,sc8280xp-lpasscc reg: @@ -39,6 +40,15 @@ required: additionalProperties: false examples: + - | + #include + lpass_audiocc: clock-controller@32a9000 { + compatible = "qcom,sc8280xp-lpassaudiocc"; + reg = <0x032a9000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + - | #include lpasscc: clock-controller@33e0000 { diff --git a/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h b/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h index df800ea2741c..d190d57fc81a 100644 --- a/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h +++ b/include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h @@ -6,6 +6,11 @@ #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H +/* LPASS AUDIO CC CSR */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 +#define LPASS_AUDIO_SWR_WSA_CGCR 1 +#define LPASS_AUDIO_SWR_WSA2_CGCR 2 + /* LPASS TCSR */ #define LPASS_AUDIO_SWR_TX_CGCR 0 -- cgit v1.2.3