From 2b20b6164ec737bec67641564e477aa6e008748b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 9 Dec 2014 22:36:50 +0000 Subject: soc/tegra: pmc: restrict compilation of suspend-related support to ARM Tegra SoCs with 64-bit ARM support don't currently support deep CPU low-power states in mainline Linux. When this support is added in the future, it will probably look rather different from the existing 32-bit ARM support, since the ARM64 maintainers' strong preference is to use PSCI to implement it. So, for the time being, prevent the CPU suspend-related code and data in the Tegra PMC driver from compiling on ARM64. Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: Thierry Reding Cc: Allen Martin Cc: Stephen Warren Cc: Alexandre Courbot Signed-off-by: Thierry Reding --- include/soc/tegra/pm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 30fe2078a547..03909101d4e7 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -17,7 +17,7 @@ enum tegra_suspend_mode { TEGRA_MAX_SUSPEND_MODE, }; -#ifdef CONFIG_PM_SLEEP +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) enum tegra_suspend_mode tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); -- cgit v1.2.3 From 24ef5745dafc2eaf287a0bb9ee9e4ff9a4f64108 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 8 Jan 2015 08:24:45 +0100 Subject: soc/tegra: Add Tegra132 support Add the chip ID for the NVIDIA Tegra132 SoC family. Signed-off-by: Thierry Reding --- include/soc/tegra/fuse.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h index 8e1249474e84..b5f7b5f8d008 100644 --- a/include/soc/tegra/fuse.h +++ b/include/soc/tegra/fuse.h @@ -21,6 +21,7 @@ #define TEGRA30 0x30 #define TEGRA114 0x35 #define TEGRA124 0x40 +#define TEGRA132 0x13 #define TEGRA_FUSE_SKU_CALIB_0 0xf0 #define TEGRA30_FUSE_SATA_CALIB 0x124 -- cgit v1.2.3 From c205389557aac828f8403db0368d1fc2ef859213 Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Wed, 7 Jan 2015 12:39:29 +0530 Subject: ARM: imx: clk-vf610: Add clock for SNVS Add support for clock gating of the SNVS peripheral. Signed-off-by: Sanchayan Maity Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-vf610.c | 2 ++ include/dt-bindings/clock/vf610-clock.h | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c index af338d23e6e7..61876ed6e11e 100644 --- a/arch/arm/mach-imx/clk-vf610.c +++ b/arch/arm/mach-imx/clk-vf610.c @@ -382,6 +382,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) clk[VF610_CLK_DMAMUX2] = imx_clk_gate2("dmamux2", "platform_bus", CCM_CCGR6, CCM_CCGRx_CGn(1)); clk[VF610_CLK_DMAMUX3] = imx_clk_gate2("dmamux3", "platform_bus", CCM_CCGR6, CCM_CCGRx_CGn(2)); + clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7)); + imx_check_clocks(clk, ARRAY_SIZE(clk)); clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]); diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h index 801c0ac50c47..979d24a6799f 100644 --- a/include/dt-bindings/clock/vf610-clock.h +++ b/include/dt-bindings/clock/vf610-clock.h @@ -192,6 +192,7 @@ #define VF610_PLL5_BYPASS 179 #define VF610_PLL6_BYPASS 180 #define VF610_PLL7_BYPASS 181 -#define VF610_CLK_END 182 +#define VF610_CLK_SNVS 182 +#define VF610_CLK_END 183 #endif /* __DT_BINDINGS_CLOCK_VF610_H */ -- cgit v1.2.3