From 7dd692217b861a8292ff8ac2c9d4458538fd6b96 Mon Sep 17 00:00:00 2001 From: Mark Hasemeyer Date: Fri, 20 Oct 2023 14:59:53 -0600 Subject: ASoC: SOF: sof-pci-dev: Fix community key quirk detection Some Chromebooks do not populate the product family DMI value resulting in firmware load failures. Add another quirk detection entry that looks for "Google" in the BIOS version. Theoretically, PRODUCT_FAMILY could be replaced with BIOS_VERSION, but it is left as a quirk to be conservative. Cc: stable@vger.kernel.org Signed-off-by: Mark Hasemeyer Acked-by: Curtis Malainey Link: https://lore.kernel.org/r/20231020145953.v1.1.Iaf5702dc3f8af0fd2f81a22ba2da1a5e15b3604c@changeid Signed-off-by: Mark Brown --- sound/soc/sof/sof-pci-dev.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c index f5ece43d0ec2..f42c85df88a8 100644 --- a/sound/soc/sof/sof-pci-dev.c +++ b/sound/soc/sof/sof-pci-dev.c @@ -145,6 +145,13 @@ static const struct dmi_system_id community_key_platforms[] = { DMI_MATCH(DMI_PRODUCT_FAMILY, "Google"), } }, + { + .ident = "Google firmware", + .callback = chromebook_use_community_key, + .matches = { + DMI_MATCH(DMI_BIOS_VERSION, "Google"), + } + }, {}, }; -- cgit v1.2.3 From 848c0d34f70c4c9f6f166ec891d309936a26aa14 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 20 Oct 2023 11:58:12 +0530 Subject: ASoC: SOF: amd: add support for acp6.3 based platform Add SOF support for ACP6.3 version based platform Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20231020062822.3913760-2-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/Kconfig | 9 +++ sound/soc/sof/amd/Makefile | 2 + sound/soc/sof/amd/acp.h | 4 ++ sound/soc/sof/amd/acp63.c | 146 ++++++++++++++++++++++++++++++++++++++++++ sound/soc/sof/amd/pci-acp63.c | 106 ++++++++++++++++++++++++++++++ 5 files changed, 267 insertions(+) create mode 100644 sound/soc/sof/amd/acp63.c create mode 100644 sound/soc/sof/amd/pci-acp63.c (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/amd/Kconfig b/sound/soc/sof/amd/Kconfig index f2faa08f0c0e..19c5e27a193f 100644 --- a/sound/soc/sof/amd/Kconfig +++ b/sound/soc/sof/amd/Kconfig @@ -60,4 +60,13 @@ config SND_SOC_SOF_ACP_PROBES This option is not user-selectable but automatically handled by 'select' statements at a higher level +config SND_SOC_SOF_AMD_ACP63 + tristate "SOF support for ACP6.3 platform" + depends on SND_SOC_SOF_PCI + select SND_SOC_SOF_AMD_COMMON + help + Select this option for SOF support on + AMD ACP6.3 version based platforms. + Say Y if you want to enable SOF on ACP6.3 based platform. + If unsure select "N". endif diff --git a/sound/soc/sof/amd/Makefile b/sound/soc/sof/amd/Makefile index f3b375e67a6f..ad25f4206177 100644 --- a/sound/soc/sof/amd/Makefile +++ b/sound/soc/sof/amd/Makefile @@ -9,8 +9,10 @@ snd-sof-amd-acp-$(CONFIG_SND_SOC_SOF_ACP_PROBES) = acp-probes.o snd-sof-amd-renoir-objs := pci-rn.o renoir.o snd-sof-amd-rembrandt-objs := pci-rmb.o rembrandt.o snd-sof-amd-vangogh-objs := pci-vangogh.o vangogh.o +snd-sof-amd-acp63-objs := pci-acp63.o acp63.o obj-$(CONFIG_SND_SOC_SOF_AMD_COMMON) += snd-sof-amd-acp.o obj-$(CONFIG_SND_SOC_SOF_AMD_RENOIR) +=snd-sof-amd-renoir.o obj-$(CONFIG_SND_SOC_SOF_AMD_REMBRANDT) +=snd-sof-amd-rembrandt.o obj-$(CONFIG_SND_SOC_SOF_AMD_VANGOGH) +=snd-sof-amd-vangogh.o +obj-$(CONFIG_SND_SOC_SOF_AMD_ACP63) +=snd-sof-amd-acp63.o diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 6814f2051104..3d2c5f07ed44 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -62,10 +62,12 @@ #define ACP_RN_PCI_ID 0x01 #define ACP_VANGOGH_PCI_ID 0x50 #define ACP_RMB_PCI_ID 0x6F +#define ACP63_PCI_ID 0x63 #define HOST_BRIDGE_CZN 0x1630 #define HOST_BRIDGE_VGH 0x1645 #define HOST_BRIDGE_RMB 0x14B5 +#define HOST_BRIDGE_ACP63 0x14E8 #define ACP_SHA_STAT 0x8000 #define ACP_PSP_TIMEOUT_US 1000000 #define ACP_EXT_INTR_ERROR_STAT 0x20000000 @@ -273,6 +275,8 @@ extern struct snd_sof_dsp_ops sof_vangogh_ops; int sof_vangogh_ops_init(struct snd_sof_dev *sdev); extern struct snd_sof_dsp_ops sof_rembrandt_ops; int sof_rembrandt_ops_init(struct snd_sof_dev *sdev); +extern struct snd_sof_dsp_ops sof_acp63_ops; +int sof_acp63_ops_init(struct snd_sof_dev *sdev); struct snd_soc_acpi_mach *amd_sof_machine_select(struct snd_sof_dev *sdev); /* Machine configuration */ diff --git a/sound/soc/sof/amd/acp63.c b/sound/soc/sof/amd/acp63.c new file mode 100644 index 000000000000..9fb645079c3a --- /dev/null +++ b/sound/soc/sof/amd/acp63.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +// +// This file is provided under a dual BSD/GPLv2 license. When using or +// redistributing this file, you may do so under either license. +// +// Copyright(c) 2023 Advanced Micro Devices, Inc. +// +// Authors: Vijendar Mukunda + +/* + * Hardware interface for Audio DSP on ACP6.3 version based platform + */ + +#include +#include + +#include "../ops.h" +#include "../sof-audio.h" +#include "acp.h" +#include "acp-dsp-offset.h" + +#define I2S_HS_INSTANCE 0 +#define I2S_BT_INSTANCE 1 +#define I2S_SP_INSTANCE 2 +#define PDM_DMIC_INSTANCE 3 +#define I2S_HS_VIRTUAL_INSTANCE 4 + +static struct snd_soc_dai_driver acp63_sof_dai[] = { + [I2S_HS_INSTANCE] = { + .id = I2S_HS_INSTANCE, + .name = "acp-sof-hs", + .playback = { + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 8, + .rate_min = 8000, + .rate_max = 96000, + }, + .capture = { + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + /* Supporting only stereo for I2S HS controller capture */ + .channels_min = 2, + .channels_max = 2, + .rate_min = 8000, + .rate_max = 48000, + }, + }, + + [I2S_BT_INSTANCE] = { + .id = I2S_BT_INSTANCE, + .name = "acp-sof-bt", + .playback = { + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 8, + .rate_min = 8000, + .rate_max = 96000, + }, + .capture = { + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + /* Supporting only stereo for I2S BT controller capture */ + .channels_min = 2, + .channels_max = 2, + .rate_min = 8000, + .rate_max = 48000, + }, + }, + + [I2S_SP_INSTANCE] = { + .id = I2S_SP_INSTANCE, + .name = "acp-sof-sp", + .playback = { + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 8, + .rate_min = 8000, + .rate_max = 96000, + }, + .capture = { + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + /* Supporting only stereo for I2S SP controller capture */ + .channels_min = 2, + .channels_max = 2, + .rate_min = 8000, + .rate_max = 48000, + }, + }, + + [PDM_DMIC_INSTANCE] = { + .id = PDM_DMIC_INSTANCE, + .name = "acp-sof-dmic", + .capture = { + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 4, + .rate_min = 8000, + .rate_max = 48000, + }, + }, + + [I2S_HS_VIRTUAL_INSTANCE] = { + .id = I2S_HS_VIRTUAL_INSTANCE, + .name = "acp-sof-hs-virtual", + .playback = { + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 8, + .rate_min = 8000, + .rate_max = 96000, + }, + }, +}; + +/* Phoenix ops */ +struct snd_sof_dsp_ops sof_acp63_ops; +EXPORT_SYMBOL_NS(sof_acp63_ops, SND_SOC_SOF_AMD_COMMON); + +int sof_acp63_ops_init(struct snd_sof_dev *sdev) +{ + /* common defaults */ + memcpy(&sof_acp63_ops, &sof_acp_common_ops, sizeof(struct snd_sof_dsp_ops)); + + sof_acp63_ops.drv = acp63_sof_dai; + sof_acp63_ops.num_drv = ARRAY_SIZE(acp63_sof_dai); + + return 0; +} + +MODULE_IMPORT_NS(SND_SOC_SOF_AMD_COMMON); +MODULE_DESCRIPTION("ACP63 SOF Driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/sound/soc/sof/amd/pci-acp63.c b/sound/soc/sof/amd/pci-acp63.c new file mode 100644 index 000000000000..bceb94ac80a9 --- /dev/null +++ b/sound/soc/sof/amd/pci-acp63.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +// +// This file is provided under a dual BSD/GPLv2 license. When using or +// redistributing this file, you may do so under either license. +// +// Copyright(c) 2023 Advanced Micro Devices, Inc. All rights reserved. +// +// Authors: Vijendar Mukunda + +/*. + * PCI interface for ACP6.3 device + */ + +#include +#include +#include +#include +#include + +#include "../ops.h" +#include "../sof-pci-dev.h" +#include "../../amd/mach-config.h" +#include "acp.h" +#include "acp-dsp-offset.h" + +#define ACP6X_FUTURE_REG_ACLK_0 0x1854 +#define ACP6x_REG_START 0x1240000 +#define ACP6x_REG_END 0x125C000 + +static const struct sof_amd_acp_desc acp63_chip_info = { + .rev = 6, + .host_bridge_id = HOST_BRIDGE_ACP63, + .pgfsm_base = ACP6X_PGFSM_BASE, + .ext_intr_stat = ACP6X_EXT_INTR_STAT, + .dsp_intr_base = ACP6X_DSP_SW_INTR_BASE, + .sram_pte_offset = ACP6X_SRAM_PTE_OFFSET, + .hw_semaphore_offset = ACP6X_AXI2DAGB_SEM_0, + .fusion_dsp_offset = ACP6X_DSP_FUSION_RUNSTALL, + .probe_reg_offset = ACP6X_FUTURE_REG_ACLK_0, +}; + +static const struct sof_dev_desc acp63_desc = { + .machines = snd_soc_acpi_amd_acp63_sof_machines, + .resindex_lpe_base = 0, + .resindex_pcicfg_base = -1, + .resindex_imr_base = -1, + .irqindex_host_ipc = -1, + .chip_info = &acp63_chip_info, + .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), + .ipc_default = SOF_IPC_TYPE_3, + .default_fw_path = { + [SOF_IPC_TYPE_3] = "amd/sof", + }, + .default_tplg_path = { + [SOF_IPC_TYPE_3] = "amd/sof-tplg", + }, + .default_fw_filename = { + [SOF_IPC_TYPE_3] = "sof-acp_6_3.ri", + }, + .nocodec_tplg_filename = "sof-acp.tplg", + .ops = &sof_acp63_ops, + .ops_init = sof_acp63_ops_init, +}; + +static int acp63_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) +{ + unsigned int flag; + + if (pci->revision != ACP63_PCI_ID) + return -ENODEV; + + flag = snd_amd_acp_find_config(pci); + if (flag != FLAG_AMD_SOF && flag != FLAG_AMD_SOF_ONLY_DMIC) + return -ENODEV; + + return sof_pci_probe(pci, pci_id); +}; + +static void acp63_pci_remove(struct pci_dev *pci) +{ + sof_pci_remove(pci); +} + +/* PCI IDs */ +static const struct pci_device_id acp63_pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_PCI_DEV_ID), + .driver_data = (unsigned long)&acp63_desc}, + { 0, } +}; +MODULE_DEVICE_TABLE(pci, acp63_pci_ids); + +/* pci_driver definition */ +static struct pci_driver snd_sof_pci_amd_acp63_driver = { + .name = KBUILD_MODNAME, + .id_table = acp63_pci_ids, + .probe = acp63_pci_probe, + .remove = acp63_pci_remove, + .driver = { + .pm = &sof_pci_pm, + }, +}; +module_pci_driver(snd_sof_pci_amd_acp63_driver); + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_IMPORT_NS(SND_SOC_SOF_AMD_COMMON); +MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); -- cgit v1.2.3 From 4dbee5104b7858e39d94b2512ab99b82b8feb894 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 20 Oct 2023 11:58:13 +0530 Subject: ASoC: SOF: amd: increase DSP cache window range Increase DSP cache window range to 2.5MB to align with ACP memory. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20231020062822.3913760-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 3d2c5f07ed44..205b434f0872 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -84,7 +84,7 @@ #define EXCEPT_MAX_HDR_SIZE 0x400 #define AMD_STACK_DUMP_SIZE 32 -#define SRAM1_SIZE 0x13A000 +#define SRAM1_SIZE 0x280000 #define PROBE_STATUS_BIT BIT(31) #define ACP_FIRMWARE_SIGNATURE 0x100 -- cgit v1.2.3 From 135e0d49cde383395afcaf285d6304be9230a06f Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 20 Oct 2023 11:58:14 +0530 Subject: ASoC: SOF: amd: refactor acp dram usage for data bin loading DSP data bin can be loaded in to ACP DRAM or ACP SRAM. Add conditional check for ACP DRAM usage for data bin loading. Rename DRAM base address macro to have symmetry. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20231020062822.3913760-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp-loader.c | 36 ++++++++++++++++++++---------------- sound/soc/sof/amd/acp.h | 3 ++- 2 files changed, 22 insertions(+), 17 deletions(-) (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/amd/acp-loader.c b/sound/soc/sof/amd/acp-loader.c index a427673cfb03..d35d47d7e311 100644 --- a/sound/soc/sof/amd/acp-loader.c +++ b/sound/soc/sof/amd/acp-loader.c @@ -83,6 +83,7 @@ int acp_dsp_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_t } dest = adata->data_buf + offset; adata->fw_data_bin_size = size + offset; + adata->is_dram_in_use = true; break; case SOF_FW_BLK_TYPE_SRAM: offset = offset - desc->sram_pte_offset; @@ -153,7 +154,7 @@ int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev) struct pci_dev *pci = to_pci_dev(sdev->dev); const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); struct acp_dev_data *adata; - unsigned int src_addr, size_fw; + unsigned int src_addr, size_fw, dest_addr; u32 page_count, dma_size; int ret; @@ -174,20 +175,21 @@ int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev) dev_err(sdev->dev, "SHA DMA transfer failed status: %d\n", ret); return ret; } - configure_pte_for_fw_loading(FW_DATA_BIN, ACP_DRAM_PAGE_COUNT, adata); - - src_addr = ACP_SYSTEM_MEMORY_WINDOW + page_count * ACP_PAGE_SIZE; - ret = configure_and_run_dma(adata, src_addr, ACP_DATA_RAM_BASE_ADDRESS, - adata->fw_data_bin_size); - if (ret < 0) { - dev_err(sdev->dev, "acp dma configuration failed: %d\n", ret); - return ret; + if (adata->is_dram_in_use) { + configure_pte_for_fw_loading(FW_DATA_BIN, ACP_DRAM_PAGE_COUNT, adata); + src_addr = ACP_SYSTEM_MEMORY_WINDOW + (page_count * ACP_PAGE_SIZE); + dest_addr = ACP_DRAM_BASE_ADDRESS; + + ret = configure_and_run_dma(adata, src_addr, dest_addr, adata->fw_data_bin_size); + if (ret < 0) { + dev_err(sdev->dev, "acp dma configuration failed: %d\n", ret); + return ret; + } + ret = acp_dma_status(adata, 0); + if (ret < 0) + dev_err(sdev->dev, "acp dma transfer status: %d\n", ret); } - ret = acp_dma_status(adata, 0); - if (ret < 0) - dev_err(sdev->dev, "acp dma transfer status: %d\n", ret); - if (desc->rev > 3) { /* Cache Window enable */ snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DSP0_CACHE_OFFSET0, desc->sram_pte_offset); @@ -197,10 +199,12 @@ int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev) /* Free memory once DMA is complete */ dma_size = (PAGE_ALIGN(sdev->basefw.fw->size) >> PAGE_SHIFT) * ACP_PAGE_SIZE; dma_free_coherent(&pci->dev, dma_size, adata->bin_buf, adata->sha_dma_addr); - dma_free_coherent(&pci->dev, ACP_DEFAULT_DRAM_LENGTH, adata->data_buf, adata->dma_addr); adata->bin_buf = NULL; - adata->data_buf = NULL; - + if (adata->is_dram_in_use) { + dma_free_coherent(&pci->dev, ACP_DEFAULT_DRAM_LENGTH, adata->data_buf, + adata->dma_addr); + adata->data_buf = NULL; + } return ret; } EXPORT_SYMBOL_NS(acp_dsp_pre_fw_run, SND_SOC_SOF_AMD_COMMON); diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 205b434f0872..2d1f57e1365a 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -54,7 +54,7 @@ #define ACP3X_SCRATCH_MEMORY_ADDRESS 0x02050000 #define ACP_SYSTEM_MEMORY_WINDOW 0x4000000 #define ACP_IRAM_BASE_ADDRESS 0x000000 -#define ACP_DATA_RAM_BASE_ADDRESS 0x01000000 +#define ACP_DRAM_BASE_ADDRESS 0x01000000 #define ACP_DRAM_PAGE_COUNT 128 #define ACP_DSP_TO_HOST_IRQ 0x04 @@ -208,6 +208,7 @@ struct acp_dev_data { struct pci_dev *smn_dev; struct acp_dsp_stream *probe_stream; bool enable_fw_debug; + bool is_dram_in_use; }; void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src, size_t bytes); -- cgit v1.2.3 From 145d7e5ae8f4e553478232fe3095379b60fa5496 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 20 Oct 2023 11:58:15 +0530 Subject: ASoC: SOF: amd: add option to use sram for data bin loading Provide an option to load DSP data bin to ACP SRAM. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20231020062822.3913760-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp-loader.c | 46 ++++++++++++++++++++++++++++++++++++------ sound/soc/sof/amd/acp.h | 10 ++++++++- 2 files changed, 49 insertions(+), 7 deletions(-) (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/amd/acp-loader.c b/sound/soc/sof/amd/acp-loader.c index d35d47d7e311..e05eb7a86dd4 100644 --- a/sound/soc/sof/amd/acp-loader.c +++ b/sound/soc/sof/amd/acp-loader.c @@ -19,8 +19,9 @@ #include "acp-dsp-offset.h" #include "acp.h" -#define FW_BIN 0 -#define FW_DATA_BIN 1 +#define FW_BIN 0 +#define FW_DATA_BIN 1 +#define FW_SRAM_DATA_BIN 2 #define FW_BIN_PTE_OFFSET 0x00 #define FW_DATA_BIN_PTE_OFFSET 0x08 @@ -49,7 +50,6 @@ int acp_dsp_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_t u32 offset, void *src, size_t size) { struct pci_dev *pci = to_pci_dev(sdev->dev); - const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); struct acp_dev_data *adata; void *dest; u32 dma_size, page_count; @@ -86,9 +86,18 @@ int acp_dsp_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_t adata->is_dram_in_use = true; break; case SOF_FW_BLK_TYPE_SRAM: - offset = offset - desc->sram_pte_offset; - memcpy_to_scratch(sdev, offset, src, size); - return 0; + if (!adata->sram_data_buf) { + adata->sram_data_buf = dma_alloc_coherent(&pci->dev, + ACP_DEFAULT_SRAM_LENGTH, + &adata->sram_dma_addr, + GFP_ATOMIC); + if (!adata->sram_data_buf) + return -ENOMEM; + } + adata->fw_sram_data_bin_size = size + offset; + dest = adata->sram_data_buf + offset; + adata->is_sram_in_use = true; + break; default: dev_err(sdev->dev, "bad blk type 0x%x\n", blk_type); return -EINVAL; @@ -123,6 +132,10 @@ static void configure_pte_for_fw_loading(int type, int num_pages, struct acp_dev offset = adata->fw_bin_page_count * 8; addr = adata->dma_addr; break; + case FW_SRAM_DATA_BIN: + offset = (adata->fw_bin_page_count + ACP_DRAM_PAGE_COUNT) * 8; + addr = adata->sram_dma_addr; + break; default: dev_err(sdev->dev, "Invalid data type %x\n", type); return; @@ -189,6 +202,22 @@ int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev) if (ret < 0) dev_err(sdev->dev, "acp dma transfer status: %d\n", ret); } + if (adata->is_sram_in_use) { + configure_pte_for_fw_loading(FW_SRAM_DATA_BIN, ACP_SRAM_PAGE_COUNT, adata); + src_addr = ACP_SYSTEM_MEMORY_WINDOW + ACP_DEFAULT_SRAM_LENGTH + + (page_count * ACP_PAGE_SIZE); + dest_addr = ACP_SRAM_BASE_ADDRESS; + + ret = configure_and_run_dma(adata, src_addr, dest_addr, + adata->fw_sram_data_bin_size); + if (ret < 0) { + dev_err(sdev->dev, "acp dma configuration failed: %d\n", ret); + return ret; + } + ret = acp_dma_status(adata, 0); + if (ret < 0) + dev_err(sdev->dev, "acp dma transfer status: %d\n", ret); + } if (desc->rev > 3) { /* Cache Window enable */ @@ -205,6 +234,11 @@ int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev) adata->dma_addr); adata->data_buf = NULL; } + if (adata->is_sram_in_use) { + dma_free_coherent(&pci->dev, ACP_DEFAULT_SRAM_LENGTH, adata->sram_data_buf, + adata->sram_dma_addr); + adata->sram_data_buf = NULL; + } return ret; } EXPORT_SYMBOL_NS(acp_dsp_pre_fw_run, SND_SOC_SOF_AMD_COMMON); diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 2d1f57e1365a..c536cfde0e44 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -56,7 +56,7 @@ #define ACP_IRAM_BASE_ADDRESS 0x000000 #define ACP_DRAM_BASE_ADDRESS 0x01000000 #define ACP_DRAM_PAGE_COUNT 128 - +#define ACP_SRAM_BASE_ADDRESS 0x3806000 #define ACP_DSP_TO_HOST_IRQ 0x04 #define ACP_RN_PCI_ID 0x01 @@ -88,6 +88,8 @@ #define PROBE_STATUS_BIT BIT(31) #define ACP_FIRMWARE_SIGNATURE 0x100 +#define ACP_DEFAULT_SRAM_LENGTH 0x00080000 +#define ACP_SRAM_PAGE_COUNT 128 enum clock_source { ACP_CLOCK_96M = 0, @@ -194,13 +196,18 @@ struct acp_dev_data { struct platform_device *dmic_dev; unsigned int fw_bin_size; unsigned int fw_data_bin_size; + unsigned int fw_sram_data_bin_size; const char *fw_code_bin; const char *fw_data_bin; + const char *fw_sram_data_bin; u32 fw_bin_page_count; + u32 fw_data_bin_page_count; dma_addr_t sha_dma_addr; u8 *bin_buf; dma_addr_t dma_addr; u8 *data_buf; + dma_addr_t sram_dma_addr; + u8 *sram_data_buf; bool signed_fw_image; struct dma_descriptor dscr_info[ACP_MAX_DESC]; struct acp_dsp_stream stream_buf[ACP_MAX_STREAM]; @@ -209,6 +216,7 @@ struct acp_dev_data { struct acp_dsp_stream *probe_stream; bool enable_fw_debug; bool is_dram_in_use; + bool is_sram_in_use; }; void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src, size_t bytes); -- cgit v1.2.3