From f6baabdcadd1080893aa5e49e6959cb070244703 Mon Sep 17 00:00:00 2001 From: Anish Moorthy Date: Thu, 23 Feb 2023 00:18:05 +0000 Subject: KVM: selftests: Fix nsec to sec conversion in demand_paging_test demand_paging_test uses 1E8 as the denominator to convert nanoseconds to seconds, which is wrong. Use NSEC_PER_SEC instead to fix the issue and make the conversion obvious. Reported-by: James Houghton Signed-off-by: Anish Moorthy Reviewed-by: Oliver Upton Reviewed-by: Sean Christopherson Link: https://lore.kernel.org/r/20230223001805.2971237-1-amoorthy@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/demand_paging_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/demand_paging_test.c b/tools/testing/selftests/kvm/demand_paging_test.c index b0e1fc4de9e2..2439c4043fed 100644 --- a/tools/testing/selftests/kvm/demand_paging_test.c +++ b/tools/testing/selftests/kvm/demand_paging_test.c @@ -194,7 +194,7 @@ static void run_test(enum vm_guest_mode mode, void *arg) ts_diff.tv_sec, ts_diff.tv_nsec); pr_info("Overall demand paging rate: %f pgs/sec\n", memstress_args.vcpu_args[0].pages * nr_vcpus / - ((double)ts_diff.tv_sec + (double)ts_diff.tv_nsec / 100000000.0)); + ((double)ts_diff.tv_sec + (double)ts_diff.tv_nsec / NSEC_PER_SEC)); memstress_destroy_vm(vm); -- cgit v1.2.3 From d14d9139c023042e63dc869a9a1be4e4eb317396 Mon Sep 17 00:00:00 2001 From: Like Xu Date: Tue, 14 Feb 2023 16:49:19 +0800 Subject: KVM: selftests: Add a helper to read kvm boolean module parameters Add a helper function for reading kvm boolean module parameters values. No functional change intended. Signed-off-by: Like Xu Link: https://lore.kernel.org/r/20230214084920.59787-2-likexu@tencent.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/kvm_util_base.h | 1 + tools/testing/selftests/kvm/lib/kvm_util.c | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/kvm_util_base.h b/tools/testing/selftests/kvm/include/kvm_util_base.h index fbc2a79369b8..a089c356f354 100644 --- a/tools/testing/selftests/kvm/include/kvm_util_base.h +++ b/tools/testing/selftests/kvm/include/kvm_util_base.h @@ -213,6 +213,7 @@ extern const struct vm_guest_mode_params vm_guest_mode_params[]; int open_path_or_exit(const char *path, int flags); int open_kvm_dev_path_or_exit(void); +bool get_kvm_param_bool(const char *param); bool get_kvm_intel_param_bool(const char *param); bool get_kvm_amd_param_bool(const char *param); diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c index 8ec20ac33de0..298c4372fb1a 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -80,6 +80,11 @@ static bool get_module_param_bool(const char *module_name, const char *param) TEST_FAIL("Unrecognized value '%c' for boolean module param", value); } +bool get_kvm_param_bool(const char *param) +{ + return get_module_param_bool("kvm", param); +} + bool get_kvm_intel_param_bool(const char *param) { return get_module_param_bool("kvm_intel", param); -- cgit v1.2.3 From 5b1abc285a083f76e9987efa9e78ecc18d5d202f Mon Sep 17 00:00:00 2001 From: Like Xu Date: Mon, 13 Mar 2023 16:53:11 +0800 Subject: KVM: selftests: Report enable_pmu module value when test is skipped Running x86_64/pmu_event_filter_test or x86_64/vmx_pmu_caps_test with enable_pmu globally disabled will report the following into: 1..0 # SKIP - Requirement not met: use_intel_pmu() || use_amd_pmu() or 1..0 # SKIP - Requirement not met: kvm_cpu_has(X86_FEATURE_PDCM) this can be confusing, so add a check on kvm.enable_pmu. Signed-off-by: Like Xu Link: https://lore.kernel.org/r/20230313085311.25327-3-likexu@tencent.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c | 1 + tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c | 1 + 2 files changed, 2 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 2feef25ba691..1f60dfae69e0 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -764,6 +764,7 @@ int main(int argc, char *argv[]) struct kvm_vcpu *vcpu, *vcpu2 = NULL; struct kvm_vm *vm; + TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_FILTER)); TEST_REQUIRE(kvm_has_cap(KVM_CAP_PMU_EVENT_MASKED_EVENTS)); diff --git a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c index c280ba1e6572..2933b1bd754e 100644 --- a/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c +++ b/tools/testing/selftests/kvm/x86_64/vmx_pmu_caps_test.c @@ -55,6 +55,7 @@ int main(int argc, char *argv[]) /* Create VM */ vm = vm_create_with_one_vcpu(&vcpu, guest_code); + TEST_REQUIRE(get_kvm_param_bool("enable_pmu")); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM)); TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION)); -- cgit v1.2.3 From 8264e85560e5fae942ca42aae1df7daeb5aaa30e Mon Sep 17 00:00:00 2001 From: Ackerley Tng Date: Mon, 27 Feb 2023 18:06:01 +0000 Subject: KVM: selftests: Adjust VM's initial stack address to align with SysV ABI spec Align the guest stack to match calling sequence requirements in section "The Stack Frame" of the System V ABI AMD64 Architecture Processor Supplement, which requires the value (%rsp + 8), NOT %rsp, to be a multiple of 16 when control is transferred to the function entry point. I.e. in a normal function call, %rsp needs to be 16-byte aligned _before_ CALL, not after. This fixes unexpected #GPs in guest code when the compiler uses SSE instructions, e.g. to initialize memory, as many SSE instructions require memory operands (including those on the stack) to be 16-byte-aligned. Signed-off-by: Ackerley Tng Link: https://lore.kernel.org/r/20230227180601.104318-1-ackerleytng@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/lib/x86_64/processor.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index c39a4353ba19..c09cd151fbe0 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -5,6 +5,7 @@ * Copyright (C) 2018, Google LLC. */ +#include "linux/bitmap.h" #include "test_util.h" #include "kvm_util.h" #include "processor.h" @@ -573,6 +574,21 @@ struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id, DEFAULT_GUEST_STACK_VADDR_MIN, MEM_REGION_DATA); + stack_vaddr += DEFAULT_STACK_PGS * getpagesize(); + + /* + * Align stack to match calling sequence requirements in section "The + * Stack Frame" of the System V ABI AMD64 Architecture Processor + * Supplement, which requires the value (%rsp + 8) to be a multiple of + * 16 when control is transferred to the function entry point. + * + * If this code is ever used to launch a vCPU with 32-bit entry point it + * may need to subtract 4 bytes instead of 8 bytes. + */ + TEST_ASSERT(IS_ALIGNED(stack_vaddr, PAGE_SIZE), + "__vm_vaddr_alloc() did not provide a page-aligned address"); + stack_vaddr -= 8; + vcpu = __vm_vcpu_add(vm, vcpu_id); vcpu_init_cpuid(vcpu, kvm_get_supported_cpuid()); vcpu_setup(vm, vcpu); @@ -580,7 +596,7 @@ struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id, /* Setup guest general purpose registers */ vcpu_regs_get(vcpu, ®s); regs.rflags = regs.rflags | 0x2; - regs.rsp = stack_vaddr + (DEFAULT_STACK_PGS * getpagesize()); + regs.rsp = stack_vaddr; regs.rip = (unsigned long) guest_code; vcpu_regs_set(vcpu, ®s); -- cgit v1.2.3 From 735b0e0f2d001b7ed9486db84453fb860e764a4d Mon Sep 17 00:00:00 2001 From: Ivan Orlov Date: Wed, 22 Mar 2023 18:45:28 +0400 Subject: KVM: selftests: Add 'malloc' failure check in vcpu_save_state There is a 'malloc' call in vcpu_save_state function, which can be unsuccessful. This patch will add the malloc failure checking to avoid possible null dereference and give more information about test fail reasons. Signed-off-by: Ivan Orlov Link: https://lore.kernel.org/r/20230322144528.704077-1-ivan.orlov0322@gmail.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/lib/x86_64/processor.c | 1 + 1 file changed, 1 insertion(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index c09cd151fbe0..a12b21a2ef37 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -970,6 +970,7 @@ struct kvm_x86_state *vcpu_save_state(struct kvm_vcpu *vcpu) vcpu_run_complete_io(vcpu); state = malloc(sizeof(*state) + msr_list->nmsrs * sizeof(state->msrs.entries[0])); + TEST_ASSERT(state, "-ENOMEM when allocating kvm state"); vcpu_events_get(vcpu, &state->events); vcpu_mp_state_get(vcpu, &state->mp_state); -- cgit v1.2.3 From 5de4a3765b7e703374aa955662bba67475a7ac92 Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:44 +0000 Subject: KVM: selftests: Add a fully functional "struct xstate" for x86 Add a working xstate data structure for the usage of AMX and potential future usage on other xstate components. AMX selftest requires checking both the xstate_bv and xcomp_bv. Existing code relies on pointer arithmetics to fetch xstate_bv and does not support xcomp_bv. So, add a working xstate data structure into processor.h for x86. Suggested-by: Sean Christopherson Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-3-mizhang@google.com Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 12 ++++++++ tools/testing/selftests/kvm/x86_64/amx_test.c | 36 +++++++--------------- 2 files changed, 23 insertions(+), 25 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 90387ddcb2a9..44b6c23d08f7 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -48,6 +48,18 @@ extern bool host_cpu_is_amd; #define X86_CR4_SMAP (1ul << 21) #define X86_CR4_PKE (1ul << 22) +struct xstate_header { + u64 xstate_bv; + u64 xcomp_bv; + u64 reserved[6]; +} __attribute__((packed)); + +struct xstate { + u8 i387[512]; + struct xstate_header header; + u8 extended_state_area[0]; +} __attribute__ ((packed, aligned (64))); + /* Note, these are ordered alphabetically to match kvm_cpuid_entry2. Eww. */ enum cpuid_output_regs { KVM_CPUID_EAX, diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index b646cdb5055a..59e0a573652d 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -41,10 +41,6 @@ #define XSAVE_HDR_OFFSET 512 -struct xsave_data { - u8 area[XSAVE_SIZE]; -} __aligned(64); - struct tile_config { u8 palette_id; u8 start_row; @@ -103,13 +99,13 @@ static inline void __tilerelease(void) asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0" ::); } -static inline void __xsavec(struct xsave_data *data, uint64_t rfbm) +static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) { uint32_t rfbm_lo = rfbm; uint32_t rfbm_hi = rfbm >> 32; asm volatile("xsavec (%%rdi)" - : : "D" (data), "a" (rfbm_lo), "d" (rfbm_hi) + : : "D" (xstate), "a" (rfbm_lo), "d" (rfbm_hi) : "memory"); } @@ -158,16 +154,6 @@ static void set_tilecfg(struct tile_config *cfg) } } -static void set_xstatebv(void *data, uint64_t bv) -{ - *(uint64_t *)(data + XSAVE_HDR_OFFSET) = bv; -} - -static u64 get_xstatebv(void *data) -{ - return *(u64 *)(data + XSAVE_HDR_OFFSET); -} - static void init_regs(void) { uint64_t cr4, xcr0; @@ -184,7 +170,7 @@ static void init_regs(void) static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, struct tile_data *tiledata, - struct xsave_data *xsave_data) + struct xstate *xstate) { init_regs(); check_cpuid_xsave(); @@ -205,9 +191,9 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, __tilerelease(); GUEST_SYNC(5); /* bit 18 not in the XCOMP_BV after xsavec() */ - set_xstatebv(xsave_data, XFEATURE_MASK_XTILEDATA); - __xsavec(xsave_data, XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT((get_xstatebv(xsave_data) & XFEATURE_MASK_XTILEDATA) == 0); + xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; + __xsavec(xstate, XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); @@ -243,7 +229,7 @@ int main(int argc, char *argv[]) struct kvm_vm *vm; struct kvm_x86_state *state; int xsave_restore_size; - vm_vaddr_t amx_cfg, tiledata, xsavedata; + vm_vaddr_t amx_cfg, tiledata, xstate; struct ucall uc; u32 amx_offset; int stage, ret; @@ -282,10 +268,10 @@ int main(int argc, char *argv[]) tiledata = vm_vaddr_alloc_pages(vm, 2); memset(addr_gva2hva(vm, tiledata), rand() | 1, 2 * getpagesize()); - /* xsave data for guest_code */ - xsavedata = vm_vaddr_alloc_pages(vm, 3); - memset(addr_gva2hva(vm, xsavedata), 0, 3 * getpagesize()); - vcpu_args_set(vcpu, 3, amx_cfg, tiledata, xsavedata); + /* XSAVE state for guest_code */ + xstate = vm_vaddr_alloc_pages(vm, DIV_ROUND_UP(XSAVE_SIZE, PAGE_SIZE)); + memset(addr_gva2hva(vm, xstate), 0, PAGE_SIZE * DIV_ROUND_UP(XSAVE_SIZE, PAGE_SIZE)); + vcpu_args_set(vcpu, 3, amx_cfg, tiledata, xstate); for (stage = 1; ; stage++) { vcpu_run(vcpu); -- cgit v1.2.3 From bec357a4af5579a60eaba6d42f7d3662d4323767 Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:45 +0000 Subject: KVM: selftests: Fix an error in comment of amx_test After the execution of __tilerelease(), AMX component will be in INIT state. Therefore, execution of XSAVEC saving the AMX state into memory will cause the xstate_bv[18] cleared in xheader. However, the xcomp_bv[18] will remain set. Fix the error in comment. Also, update xsavec() to XSAVEC because xcomp_bv[18] is set due to the instruction, not the function. Finally, use XTILEDATA instead 'bit 18' in comments. Cc: Jim Mattson Cc: Venkatesh Srinivas Cc: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-4-mizhang@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 59e0a573652d..c59d7ff0b01d 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -190,7 +190,10 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, GUEST_SYNC(4); __tilerelease(); GUEST_SYNC(5); - /* bit 18 not in the XCOMP_BV after xsavec() */ + /* + * After XSAVEC, XTILEDATA is cleared in the xstate_bv but is set in + * the xcomp_bv. + */ xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; __xsavec(xstate, XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); -- cgit v1.2.3 From 48ad4222c43ceb5ce303758ff26e1d8c881502ac Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:46 +0000 Subject: KVM: selftests: Enable checking on xcomp_bv in amx_test After tilerelease instruction, AMX tiles are in INIT state. According to Intel SDM vol 1. 13.10: "If RFBM[i] = 1, XSTATE_BV[i] is set to the value of XINUSE[i].", XSTATE_BV[18] should be cleared after xsavec. On the other hand, according to Intel SDM vol 1. 13.4.3: "If XCOMP_BV[i] = 1, state component i is located at a byte offset locationI from the base address of the XSAVE area". Since at the time of xsavec, XCR0[18] is set indicating AMX tile data component is still enabled, xcomp_bv[18] should be set. Complete the checks by adding the assert to xcomp_bv[18] after xsavec. Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-5-mizhang@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index c59d7ff0b01d..34cf6f253c13 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -197,6 +197,7 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; __xsavec(xstate, XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_ASSERT(xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA); /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); -- cgit v1.2.3 From 0aeb9729486a32fab168114b00006b2643aa8a41 Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:47 +0000 Subject: KVM: selftests: Add check of CR0.TS in the #NM handler in amx_test Be extra paranoid and assert that CR0.TS is clear when verifying the #NM in the AMX test is due to the expected XFeature Disable error, i.e. that the #NM isn't due to CR0.TS=1. Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-6-mizhang@google.com [sean: reword changelog to make it clear this is pure paranoia] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 34cf6f253c13..95a30611e03e 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -216,6 +216,7 @@ void guest_nm_handler(struct ex_regs *regs) { /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ GUEST_SYNC(7); + GUEST_ASSERT(!(get_cr0() & X86_CR0_TS)); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); -- cgit v1.2.3 From 9cbd9aaa670f7be61ba569f5c3ebafc2e0aabeb6 Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:48 +0000 Subject: KVM: selftests: Assert that XTILE_DATA is set in IA32_XFD on #NM Add an extra check to IA32_XFD to ensure that XTILE_DATA is actually set, i.e. is consistent with the AMX architecture. In addition, repeat the checks after the guest/host world switch to ensure the values of IA32_XFD and IA32_XFD_ERR are well preserved. Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-7-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 95a30611e03e..cd0491cc7c8c 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -218,8 +218,10 @@ void guest_nm_handler(struct ex_regs *regs) GUEST_SYNC(7); GUEST_ASSERT(!(get_cr0() & X86_CR0_TS)); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); /* Clear xfd_err */ wrmsr(MSR_IA32_XFD_ERR, 0); /* xfd=0, enable amx */ -- cgit v1.2.3 From bfc5afc37c9dba85f8c057fb85109a72e72d64a5 Mon Sep 17 00:00:00 2001 From: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:50 +0000 Subject: KVM: selftests: Verify XTILE_DATA in XSTATE isn't affected by IA32_XFD Add asserts to verify the XSTATE metadata for XTILE_DATA isn't affected by disabling AMX tile data via IA32_XFD. XFD doesn't intercept XSAVE, it only prevents setting bits in XCR0, i.e. regardless of XFD, AMX state is managed by XSAVE/XRSTOR as long as the corresponding bits are set XCR0. Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-9-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index cd0491cc7c8c..e6bc6cd108dc 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -201,6 +201,16 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); + + /* + * XTILEDATA is cleared in xstate_bv but set in xcomp_bv, this property + * remains the same even when amx tiledata is disabled by IA32_XFD. + */ + xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; + __xsavec(xstate, XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_SYNC(6); GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); set_tilecfg(amx_cfg); -- cgit v1.2.3 From 7e1075f050782c4d1249ebb15f63836bc2a94a97 Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 21 Feb 2023 16:36:51 +0000 Subject: KVM: selftests: Assert that XTILE is XSAVE-enabled Assert that XTILE is XSAVE-enabled. check_xsave_supports_xtile() doesn't actually check anything since its return value is not used. Add the intended assert. Opportunistically, move the assert to a more appropriate location: immediately after XSETBV and remove check_xsave_supports_xtile(). Fixes: 5dc19f1c7dd3 ("KVM: selftests: Convert AMX test to use X86_PROPRETY_XXX") Signed-off-by: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-10-mizhang@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index e6bc6cd108dc..6f788e6d8a8d 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -115,11 +115,6 @@ static inline void check_cpuid_xsave(void) GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); } -static bool check_xsave_supports_xtile(void) -{ - return __xgetbv(0) & XFEATURE_MASK_XTILE; -} - static void check_xtile_info(void) { GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0)); @@ -166,6 +161,7 @@ static void init_regs(void) xcr0 = __xgetbv(0); xcr0 |= XFEATURE_MASK_XTILE; __xsetbv(0x0, xcr0); + GUEST_ASSERT(__xgetbv(0) & XFEATURE_MASK_XTILE); } static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, @@ -174,7 +170,6 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, { init_regs(); check_cpuid_xsave(); - check_xsave_supports_xtile(); check_xtile_info(); GUEST_SYNC(1); -- cgit v1.2.3 From 2ab3991b0b9b57affd26ab116c6e1aab5c1bf8c3 Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 21 Feb 2023 16:36:52 +0000 Subject: KVM: selftests: Assert that both XTILE{CFG,DATA} are XSAVE-enabled Assert that both XTILE{CFG,DATA} are written and read back via XSETBV and XGETBV respectively. The original check in amx_test only ensures at least one of the XTILE bits are set, XTILECFG or XTILEDATA, when it really should be checking that both are set. Fixes: bf70636d9443 ("selftest: kvm: Add amx selftest") Signed-off-by: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-11-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 6f788e6d8a8d..e9d31f443192 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -161,7 +161,7 @@ static void init_regs(void) xcr0 = __xgetbv(0); xcr0 |= XFEATURE_MASK_XTILE; __xsetbv(0x0, xcr0); - GUEST_ASSERT(__xgetbv(0) & XFEATURE_MASK_XTILE); + GUEST_ASSERT((__xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); } static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, -- cgit v1.2.3 From d01d4a4f7bd2197208b904378debf3331eec936e Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 21 Feb 2023 16:36:53 +0000 Subject: KVM: selftests: Move XSAVE and OSXSAVE CPUID checks into AMX's init_regs() Move the checks on XSAVE and OSXSAVE into init_regs() so that the XSAVE check is done before setting CR4.OSXSAVE, i.e. before a potential #GP, and so that the OSXSAVE check is performend immediately after enabling XSAVE in CR4. Signed-off-by: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-12-mizhang@google.com [sean: keep XSAVE check, rewrite changelog accordingly] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/amx_test.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index e9d31f443192..d1838d5ad9d7 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -109,12 +109,6 @@ static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) : "memory"); } -static inline void check_cpuid_xsave(void) -{ - GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE)); - GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); -} - static void check_xtile_info(void) { GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0)); @@ -153,10 +147,13 @@ static void init_regs(void) { uint64_t cr4, xcr0; + GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE)); + /* turn on CR4.OSXSAVE */ cr4 = get_cr4(); cr4 |= X86_CR4_OSXSAVE; set_cr4(cr4); + GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); xcr0 = __xgetbv(0); xcr0 |= XFEATURE_MASK_XTILE; @@ -169,7 +166,6 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, struct xstate *xstate) { init_regs(); - check_cpuid_xsave(); check_xtile_info(); GUEST_SYNC(1); -- cgit v1.2.3 From d32fb071429360f5f597c284087c845b2f748ebe Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 21 Feb 2023 16:36:54 +0000 Subject: KVM: selftests: Check that the palette table exists before using it Check that the palette table exists before using it. The maximum number of AMX palette tables is enumerated by CPUID.1DH:EAX. Assert that the palette used in amx_test, CPUID.1DH.1H, does not exceed that maximum. Signed-off-by: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-13-mizhang@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 1 + tools/testing/selftests/kvm/x86_64/amx_test.c | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 44b6c23d08f7..f108fae5d29e 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -227,6 +227,7 @@ struct kvm_x86_cpu_property { #define X86_PROPERTY_XSTATE_MAX_SIZE KVM_X86_CPU_PROPERTY(0xd, 0, ECX, 0, 31) #define X86_PROPERTY_XSTATE_TILE_SIZE KVM_X86_CPU_PROPERTY(0xd, 18, EAX, 0, 31) #define X86_PROPERTY_XSTATE_TILE_OFFSET KVM_X86_CPU_PROPERTY(0xd, 18, EBX, 0, 31) +#define X86_PROPERTY_AMX_MAX_PALETTE_TABLES KVM_X86_CPU_PROPERTY(0x1d, 0, EAX, 0, 31) #define X86_PROPERTY_AMX_TOTAL_TILE_BYTES KVM_X86_CPU_PROPERTY(0x1d, 1, EAX, 0, 15) #define X86_PROPERTY_AMX_BYTES_PER_TILE KVM_X86_CPU_PROPERTY(0x1d, 1, EAX, 16, 31) #define X86_PROPERTY_AMX_BYTES_PER_ROW KVM_X86_CPU_PROPERTY(0x1d, 1, EBX, 0, 15) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index d1838d5ad9d7..8e8f26d715d6 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -30,6 +30,7 @@ #define XSAVE_SIZE ((NUM_TILES * TILE_SIZE) + PAGE_SIZE) /* Tile configuration associated: */ +#define PALETTE_TABLE_INDEX 1 #define MAX_TILES 16 #define RESERVED_BYTES 14 @@ -120,6 +121,10 @@ static void check_xtile_info(void) GUEST_ASSERT(xtile.xsave_size == 8192); GUEST_ASSERT(sizeof(struct tile_data) >= xtile.xsave_size); + GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_AMX_MAX_PALETTE_TABLES)); + GUEST_ASSERT(this_cpu_property(X86_PROPERTY_AMX_MAX_PALETTE_TABLES) >= + PALETTE_TABLE_INDEX); + GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_AMX_NR_TILE_REGS)); xtile.max_names = this_cpu_property(X86_PROPERTY_AMX_NR_TILE_REGS); GUEST_ASSERT(xtile.max_names == 8); -- cgit v1.2.3 From d563164eaeb1a995c2a10ace6fdb0a730b41c167 Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 21 Feb 2023 16:36:55 +0000 Subject: KVM: selftests: Check that XTILEDATA supports XFD Check that XTILEDATA supports XFD. In amx_test, add the requirement that the guest allows the xfeature, XTILEDATA, to be set in XFD. Otherwise, the test may fail. Signed-off-by: Aaron Lewis Signed-off-by: Mingwei Zhang Link: https://lore.kernel.org/r/20230221163655.920289-14-mizhang@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 1 + tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 2 files changed, 2 insertions(+) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index f108fae5d29e..3538fa6db72d 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -143,6 +143,7 @@ struct kvm_x86_cpu_feature { #define X86_FEATURE_XTILEDATA KVM_X86_CPU_FEATURE(0xD, 0, EAX, 18) #define X86_FEATURE_XSAVES KVM_X86_CPU_FEATURE(0xD, 1, EAX, 3) #define X86_FEATURE_XFD KVM_X86_CPU_FEATURE(0xD, 1, EAX, 4) +#define X86_FEATURE_XTILEDATA_XFD KVM_X86_CPU_FEATURE(0xD, 18, ECX, 2) /* * Extended Leafs, a.k.a. AMD defined diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 8e8f26d715d6..5c82d7e6f552 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -258,6 +258,7 @@ int main(int argc, char *argv[]) TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_AMX_TILE)); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XTILECFG)); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XTILEDATA)); + TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XTILEDATA_XFD)); /* Create VM */ vm = vm_create_with_one_vcpu(&vcpu, guest_code); -- cgit v1.2.3 From 7712145073876092e9aa81f0b836fef8b5694b14 Mon Sep 17 00:00:00 2001 From: Hao Ge Date: Wed, 5 Apr 2023 18:13:50 +0800 Subject: KVM: selftests: Close opened file descriptor in stable_tsc_check_supported() Close the "current_clocksource" file descriptor before returning or exiting from stable_tsc_check_supported() in vmx_nested_tsc_scaling_test. Signed-off-by: Hao Ge Reviewed-by: Vipin Sharma Link: https://lore.kernel.org/r/20230405101350.259000-1-gehao@kylinos.cn Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c b/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c index d427eb146bc5..fa03c8d1ce4e 100644 --- a/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c +++ b/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c @@ -126,12 +126,16 @@ static void stable_tsc_check_supported(void) goto skip_test; if (fgets(buf, sizeof(buf), fp) == NULL) - goto skip_test; + goto close_fp; if (strncmp(buf, "tsc", sizeof(buf))) - goto skip_test; + goto close_fp; + fclose(fp); return; + +close_fp: + fclose(fp); skip_test: print_skip("Kernel does not use TSC clocksource - assuming that host TSC is not stable"); exit(KSFT_SKIP); -- cgit v1.2.3 From b213812d3f4c29502d46f82e40a82cf959670e58 Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 4 Apr 2023 17:45:17 -0700 Subject: KVM: selftests: Move XGETBV and XSETBV helpers to common code The instructions XGETBV and XSETBV are useful to other tests. Move them to processor.h to make them more broadly available. No functional change intended. Reviewed-by: Jim Mattson Signed-off-by: Aaron Lewis Reviewed-by: Mingwei Zhang [sean: reword shortlog] Reviewed-by: Aaron Lewis Tested-by: Aaron Lewis Link: https://lore.kernel.org/r/20230405004520.421768-4-seanjc@google.com Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 18 ++++++++++++++++ tools/testing/selftests/kvm/x86_64/amx_test.c | 24 +++------------------- 2 files changed, 21 insertions(+), 21 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 3538fa6db72d..f6061fe7057f 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -510,6 +510,24 @@ static inline void set_cr4(uint64_t val) __asm__ __volatile__("mov %0, %%cr4" : : "r" (val) : "memory"); } +static inline u64 xgetbv(u32 index) +{ + u32 eax, edx; + + __asm__ __volatile__("xgetbv;" + : "=a" (eax), "=d" (edx) + : "c" (index)); + return eax | ((u64)edx << 32); +} + +static inline void xsetbv(u32 index, u64 value) +{ + u32 eax = value; + u32 edx = value >> 32; + + __asm__ __volatile__("xsetbv" :: "a" (eax), "d" (edx), "c" (index)); +} + static inline struct desc_ptr get_gdt(void) { struct desc_ptr gdt; diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 5c82d7e6f552..af1ef6f79d32 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -65,24 +65,6 @@ struct xtile_info { static struct xtile_info xtile; -static inline u64 __xgetbv(u32 index) -{ - u32 eax, edx; - - asm volatile("xgetbv;" - : "=a" (eax), "=d" (edx) - : "c" (index)); - return eax + ((u64)edx << 32); -} - -static inline void __xsetbv(u32 index, u64 value) -{ - u32 eax = value; - u32 edx = value >> 32; - - asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index)); -} - static inline void __ldtilecfg(void *cfg) { asm volatile(".byte 0xc4,0xe2,0x78,0x49,0x00" @@ -160,10 +142,10 @@ static void init_regs(void) set_cr4(cr4); GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); - xcr0 = __xgetbv(0); + xcr0 = xgetbv(0); xcr0 |= XFEATURE_MASK_XTILE; - __xsetbv(0x0, xcr0); - GUEST_ASSERT((__xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); + xsetbv(0x0, xcr0); + GUEST_ASSERT((xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); } static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, -- cgit v1.2.3 From 7040e54fddf681758800d7375e728557213366f9 Mon Sep 17 00:00:00 2001 From: Sean Christopherson Date: Tue, 4 Apr 2023 17:45:18 -0700 Subject: KVM: selftests: Rework dynamic XFeature helper to take mask, not bit Take the XFeature mask in __vm_xsave_require_permission() instead of the bit so that there's no need to define macros for both the bit and the mask. Asserting that only a single bit is set and retrieving said bit is easy enough via log2 helpers. Opportunistically clean up the error message for the ARCH_REQ_XCOMP_GUEST_PERM sanity check. Reviewed-by: Aaron Lewis Tested-by: Aaron Lewis Link: https://lore.kernel.org/r/20230405004520.421768-5-seanjc@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/include/x86_64/processor.h | 6 +++--- tools/testing/selftests/kvm/lib/x86_64/processor.c | 17 ++++++++++------- tools/testing/selftests/kvm/x86_64/amx_test.c | 2 +- 3 files changed, 14 insertions(+), 11 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index f6061fe7057f..41d798375570 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1098,10 +1098,10 @@ uint64_t kvm_hypercall(uint64_t nr, uint64_t a0, uint64_t a1, uint64_t a2, uint64_t __xen_hypercall(uint64_t nr, uint64_t a0, void *a1); void xen_hypercall(uint64_t nr, uint64_t a0, void *a1); -void __vm_xsave_require_permission(int bit, const char *name); +void __vm_xsave_require_permission(uint64_t xfeature, const char *name); -#define vm_xsave_require_permission(perm) \ - __vm_xsave_require_permission(perm, #perm) +#define vm_xsave_require_permission(xfeature) \ + __vm_xsave_require_permission(xfeature, #xfeature) enum pg_level { PG_LEVEL_NONE, diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index a12b21a2ef37..898b30096c80 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -697,7 +697,7 @@ uint64_t kvm_get_feature_msr(uint64_t msr_index) return buffer.entry.data; } -void __vm_xsave_require_permission(int bit, const char *name) +void __vm_xsave_require_permission(uint64_t xfeature, const char *name) { int kvm_fd; u64 bitmask; @@ -705,12 +705,15 @@ void __vm_xsave_require_permission(int bit, const char *name) struct kvm_device_attr attr = { .group = 0, .attr = KVM_X86_XCOMP_GUEST_SUPP, - .addr = (unsigned long) &bitmask + .addr = (unsigned long) &bitmask, }; TEST_ASSERT(!kvm_supported_cpuid, "kvm_get_supported_cpuid() cannot be used before ARCH_REQ_XCOMP_GUEST_PERM"); + TEST_ASSERT(is_power_of_2(xfeature), + "Dynamic XFeatures must be enabled one at a time"); + kvm_fd = open_kvm_dev_path_or_exit(); rc = __kvm_ioctl(kvm_fd, KVM_GET_DEVICE_ATTR, &attr); close(kvm_fd); @@ -720,16 +723,16 @@ void __vm_xsave_require_permission(int bit, const char *name) TEST_ASSERT(rc == 0, "KVM_GET_DEVICE_ATTR(0, KVM_X86_XCOMP_GUEST_SUPP) error: %ld", rc); - __TEST_REQUIRE(bitmask & (1ULL << bit), + __TEST_REQUIRE(bitmask & xfeature, "Required XSAVE feature '%s' not supported", name); - TEST_REQUIRE(!syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_GUEST_PERM, bit)); + TEST_REQUIRE(!syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_GUEST_PERM, ilog2(xfeature))); rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_GUEST_PERM, &bitmask); TEST_ASSERT(rc == 0, "prctl(ARCH_GET_XCOMP_GUEST_PERM) error: %ld", rc); - TEST_ASSERT(bitmask & (1ULL << bit), - "prctl(ARCH_REQ_XCOMP_GUEST_PERM) failure bitmask=0x%lx", - bitmask); + TEST_ASSERT(bitmask & xfeature, + "'%s' (0x%lx) not permitted after prctl(ARCH_REQ_XCOMP_GUEST_PERM) perrmited=0x%lx", + name, xfeature, bitmask); } void vcpu_init_cpuid(struct kvm_vcpu *vcpu, const struct kvm_cpuid2 *cpuid) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index af1ef6f79d32..a0f74f5121a6 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -233,7 +233,7 @@ int main(int argc, char *argv[]) * Note, all off-by-default features must be enabled before anything * caches KVM_GET_SUPPORTED_CPUID, e.g. before using kvm_cpu_has(). */ - vm_xsave_require_permission(XSTATE_XTILE_DATA_BIT); + vm_xsave_require_permission(XFEATURE_MASK_XTILEDATA); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XFD)); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XSAVE)); -- cgit v1.2.3 From 28f2302584af8ed60e2108bf40762a5c40ecb372 Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 4 Apr 2023 17:45:19 -0700 Subject: KVM: selftests: Add all known XFEATURE masks to common code Add all known XFEATURE masks to processor.h to make them more broadly available in KVM selftests. Relocate and clean up the exiting AMX (XTILE) defines in processor.h, e.g. drop the intermediate define and use BIT_ULL. Signed-off-by: Aaron Lewis Reviewed-by: Aaron Lewis Tested-by: Aaron Lewis Link: https://lore.kernel.org/r/20230405004520.421768-6-seanjc@google.com Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 25 +++++++++----- tools/testing/selftests/kvm/x86_64/amx_test.c | 38 +++++++++------------- 2 files changed, 33 insertions(+), 30 deletions(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 41d798375570..187309f3e7e9 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -60,6 +60,23 @@ struct xstate { u8 extended_state_area[0]; } __attribute__ ((packed, aligned (64))); +#define XFEATURE_MASK_FP BIT_ULL(0) +#define XFEATURE_MASK_SSE BIT_ULL(1) +#define XFEATURE_MASK_YMM BIT_ULL(2) +#define XFEATURE_MASK_BNDREGS BIT_ULL(3) +#define XFEATURE_MASK_BNDCSR BIT_ULL(4) +#define XFEATURE_MASK_OPMASK BIT_ULL(5) +#define XFEATURE_MASK_ZMM_Hi256 BIT_ULL(6) +#define XFEATURE_MASK_Hi16_ZMM BIT_ULL(7) +#define XFEATURE_MASK_XTILE_CFG BIT_ULL(17) +#define XFEATURE_MASK_XTILE_DATA BIT_ULL(18) + +#define XFEATURE_MASK_AVX512 (XFEATURE_MASK_OPMASK | \ + XFEATURE_MASK_ZMM_Hi256 | \ + XFEATURE_MASK_Hi16_ZMM) +#define XFEATURE_MASK_XTILE (XFEATURE_MASK_XTILE_DATA | \ + XFEATURE_MASK_XTILE_CFG) + /* Note, these are ordered alphabetically to match kvm_cpuid_entry2. Eww. */ enum cpuid_output_regs { KVM_CPUID_EAX, @@ -1138,14 +1155,6 @@ void virt_map_level(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, #define X86_CR0_CD (1UL<<30) /* Cache Disable */ #define X86_CR0_PG (1UL<<31) /* Paging */ -#define XSTATE_XTILE_CFG_BIT 17 -#define XSTATE_XTILE_DATA_BIT 18 - -#define XSTATE_XTILE_CFG_MASK (1ULL << XSTATE_XTILE_CFG_BIT) -#define XSTATE_XTILE_DATA_MASK (1ULL << XSTATE_XTILE_DATA_BIT) -#define XFEATURE_XTILE_MASK (XSTATE_XTILE_CFG_MASK | \ - XSTATE_XTILE_DATA_MASK) - #define PFERR_PRESENT_BIT 0 #define PFERR_WRITE_BIT 1 #define PFERR_USER_BIT 2 diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index a0f74f5121a6..11329e5ff945 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -34,12 +34,6 @@ #define MAX_TILES 16 #define RESERVED_BYTES 14 -#define XFEATURE_XTILECFG 17 -#define XFEATURE_XTILEDATA 18 -#define XFEATURE_MASK_XTILECFG (1 << XFEATURE_XTILECFG) -#define XFEATURE_MASK_XTILEDATA (1 << XFEATURE_XTILEDATA) -#define XFEATURE_MASK_XTILE (XFEATURE_MASK_XTILECFG | XFEATURE_MASK_XTILEDATA) - #define XSAVE_HDR_OFFSET 512 struct tile_config { @@ -172,25 +166,25 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, * After XSAVEC, XTILEDATA is cleared in the xstate_bv but is set in * the xcomp_bv. */ - xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; - __xsavec(xstate, XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); - GUEST_ASSERT(xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA); + xstate->header.xstate_bv = XFEATURE_MASK_XTILE_DATA; + __xsavec(xstate, XFEATURE_MASK_XTILE_DATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILE_DATA)); + GUEST_ASSERT(xstate->header.xcomp_bv & XFEATURE_MASK_XTILE_DATA); /* xfd=0x40000, disable amx tiledata */ - wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); + wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILE_DATA); /* * XTILEDATA is cleared in xstate_bv but set in xcomp_bv, this property * remains the same even when amx tiledata is disabled by IA32_XFD. */ - xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; - __xsavec(xstate, XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); - GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA)); + xstate->header.xstate_bv = XFEATURE_MASK_XTILE_DATA; + __xsavec(xstate, XFEATURE_MASK_XTILE_DATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILE_DATA)); + GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILE_DATA)); GUEST_SYNC(6); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA); set_tilecfg(amx_cfg); __ldtilecfg(amx_cfg); /* Trigger #NM exception */ @@ -202,14 +196,14 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, void guest_nm_handler(struct ex_regs *regs) { - /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ + /* Check if #NM is triggered by XFEATURE_MASK_XTILE_DATA */ GUEST_SYNC(7); GUEST_ASSERT(!(get_cr0() & X86_CR0_TS)); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILE_DATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA); GUEST_SYNC(8); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILE_DATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA); /* Clear xfd_err */ wrmsr(MSR_IA32_XFD_ERR, 0); /* xfd=0, enable amx */ @@ -233,7 +227,7 @@ int main(int argc, char *argv[]) * Note, all off-by-default features must be enabled before anything * caches KVM_GET_SUPPORTED_CPUID, e.g. before using kvm_cpu_has(). */ - vm_xsave_require_permission(XFEATURE_MASK_XTILEDATA); + vm_xsave_require_permission(XFEATURE_MASK_XTILE_DATA); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XFD)); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XSAVE)); -- cgit v1.2.3 From 03a405b7a522700a654b79903312d0a305bdce0d Mon Sep 17 00:00:00 2001 From: Aaron Lewis Date: Tue, 4 Apr 2023 17:45:20 -0700 Subject: KVM: selftests: Add test to verify KVM's supported XCR0 Check both architectural rules and KVM's ABI for KVM_GET_SUPPORTED_CPUID to ensure the supported xfeatures[1] don't violate any of them. The architectural rules[2] and KVM's contract with userspace ensure for a given feature, e.g. sse, avx, amx, etc... their associated xfeatures are either all sets or none of them are set, and any dependencies are enabled if needed. [1] EDX:EAX of CPUID.(EAX=0DH,ECX=0) [2] SDM vol 1, 13.3 ENABLING THE XSAVE FEATURE SET AND XSAVE-ENABLED FEATURES Cc: Mingwei Zhang Signed-off-by: Aaron Lewis [sean: expand comments, use a fancy X86_PROPERTY] Reviewed-by: Aaron Lewis Tested-by: Aaron Lewis Link: https://lore.kernel.org/r/20230405004520.421768-7-seanjc@google.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/include/x86_64/processor.h | 20 ++++ .../testing/selftests/kvm/x86_64/xcr0_cpuid_test.c | 132 +++++++++++++++++++++ 3 files changed, 153 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/xcr0_cpuid_test.c (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 84a627c43795..18cadc669798 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -105,6 +105,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/vmx_tsc_adjust_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_nested_tsc_scaling_test TEST_GEN_PROGS_x86_64 += x86_64/xapic_ipi_test TEST_GEN_PROGS_x86_64 += x86_64/xapic_state_test +TEST_GEN_PROGS_x86_64 += x86_64/xcr0_cpuid_test TEST_GEN_PROGS_x86_64 += x86_64/xss_msr_test TEST_GEN_PROGS_x86_64 += x86_64/debug_regs TEST_GEN_PROGS_x86_64 += x86_64/tsc_msrs_test diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 187309f3e7e9..70c5469e4023 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -241,8 +241,11 @@ struct kvm_x86_cpu_property { #define X86_PROPERTY_PMU_NR_GP_COUNTERS KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 8, 15) #define X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 24, 31) +#define X86_PROPERTY_SUPPORTED_XCR0_LO KVM_X86_CPU_PROPERTY(0xd, 0, EAX, 0, 31) #define X86_PROPERTY_XSTATE_MAX_SIZE_XCR0 KVM_X86_CPU_PROPERTY(0xd, 0, EBX, 0, 31) #define X86_PROPERTY_XSTATE_MAX_SIZE KVM_X86_CPU_PROPERTY(0xd, 0, ECX, 0, 31) +#define X86_PROPERTY_SUPPORTED_XCR0_HI KVM_X86_CPU_PROPERTY(0xd, 0, EDX, 0, 31) + #define X86_PROPERTY_XSTATE_TILE_SIZE KVM_X86_CPU_PROPERTY(0xd, 18, EAX, 0, 31) #define X86_PROPERTY_XSTATE_TILE_OFFSET KVM_X86_CPU_PROPERTY(0xd, 18, EBX, 0, 31) #define X86_PROPERTY_AMX_MAX_PALETTE_TABLES KVM_X86_CPU_PROPERTY(0x1d, 0, EAX, 0, 31) @@ -681,6 +684,15 @@ static inline bool this_pmu_has(struct kvm_x86_pmu_feature feature) !this_cpu_has(feature.anti_feature); } +static __always_inline uint64_t this_cpu_supported_xcr0(void) +{ + if (!this_cpu_has_p(X86_PROPERTY_SUPPORTED_XCR0_LO)) + return 0; + + return this_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_LO) | + ((uint64_t)this_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_HI) << 32); +} + typedef u32 __attribute__((vector_size(16))) sse128_t; #define __sse128_u union { sse128_t vec; u64 as_u64[2]; u32 as_u32[4]; } #define sse128_lo(x) ({ __sse128_u t; t.vec = x; t.as_u64[0]; }) @@ -1104,6 +1116,14 @@ static inline uint8_t wrmsr_safe(uint32_t msr, uint64_t val) return kvm_asm_safe("wrmsr", "a"(val & -1u), "d"(val >> 32), "c"(msr)); } +static inline uint8_t xsetbv_safe(uint32_t index, uint64_t value) +{ + u32 eax = value; + u32 edx = value >> 32; + + return kvm_asm_safe("xsetbv", "a" (eax), "d" (edx), "c" (index)); +} + bool kvm_is_tdp_enabled(void); uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, uint64_t vaddr, diff --git a/tools/testing/selftests/kvm/x86_64/xcr0_cpuid_test.c b/tools/testing/selftests/kvm/x86_64/xcr0_cpuid_test.c new file mode 100644 index 000000000000..905bd5ae4431 --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/xcr0_cpuid_test.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * XCR0 cpuid test + * + * Copyright (C) 2022, Google LLC. + */ + +#include +#include +#include +#include +#include + +#include "test_util.h" + +#include "kvm_util.h" +#include "processor.h" + +/* + * Assert that architectural dependency rules are satisfied, e.g. that AVX is + * supported if and only if SSE is supported. + */ +#define ASSERT_XFEATURE_DEPENDENCIES(supported_xcr0, xfeatures, dependencies) \ +do { \ + uint64_t __supported = (supported_xcr0) & ((xfeatures) | (dependencies)); \ + \ + GUEST_ASSERT_3((__supported & (xfeatures)) != (xfeatures) || \ + __supported == ((xfeatures) | (dependencies)), \ + __supported, (xfeatures), (dependencies)); \ +} while (0) + +/* + * Assert that KVM reports a sane, usable as-is XCR0. Architecturally, a CPU + * isn't strictly required to _support_ all XFeatures related to a feature, but + * at the same time XSETBV will #GP if bundled XFeatures aren't enabled and + * disabled coherently. E.g. a CPU can technically enumerate supported for + * XTILE_CFG but not XTILE_DATA, but attempting to enable XTILE_CFG without + * XTILE_DATA will #GP. + */ +#define ASSERT_ALL_OR_NONE_XFEATURE(supported_xcr0, xfeatures) \ +do { \ + uint64_t __supported = (supported_xcr0) & (xfeatures); \ + \ + GUEST_ASSERT_2(!__supported || __supported == (xfeatures), \ + __supported, (xfeatures)); \ +} while (0) + +static void guest_code(void) +{ + uint64_t xcr0_reset; + uint64_t supported_xcr0; + int i, vector; + + set_cr4(get_cr4() | X86_CR4_OSXSAVE); + + xcr0_reset = xgetbv(0); + supported_xcr0 = this_cpu_supported_xcr0(); + + GUEST_ASSERT(xcr0_reset == XFEATURE_MASK_FP); + + /* Check AVX */ + ASSERT_XFEATURE_DEPENDENCIES(supported_xcr0, + XFEATURE_MASK_YMM, + XFEATURE_MASK_SSE); + + /* Check MPX */ + ASSERT_ALL_OR_NONE_XFEATURE(supported_xcr0, + XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); + + /* Check AVX-512 */ + ASSERT_XFEATURE_DEPENDENCIES(supported_xcr0, + XFEATURE_MASK_AVX512, + XFEATURE_MASK_SSE | XFEATURE_MASK_YMM); + ASSERT_ALL_OR_NONE_XFEATURE(supported_xcr0, + XFEATURE_MASK_AVX512); + + /* Check AMX */ + ASSERT_ALL_OR_NONE_XFEATURE(supported_xcr0, + XFEATURE_MASK_XTILE); + + vector = xsetbv_safe(0, supported_xcr0); + GUEST_ASSERT_2(!vector, supported_xcr0, vector); + + for (i = 0; i < 64; i++) { + if (supported_xcr0 & BIT_ULL(i)) + continue; + + vector = xsetbv_safe(0, supported_xcr0 | BIT_ULL(i)); + GUEST_ASSERT_3(vector == GP_VECTOR, supported_xcr0, vector, BIT_ULL(i)); + } + + GUEST_DONE(); +} + +int main(int argc, char *argv[]) +{ + struct kvm_vcpu *vcpu; + struct kvm_run *run; + struct kvm_vm *vm; + struct ucall uc; + + TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_XSAVE)); + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + run = vcpu->run; + + vm_init_descriptor_tables(vm); + vcpu_init_descriptor_tables(vcpu); + + while (1) { + vcpu_run(vcpu); + + TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, + "Unexpected exit reason: %u (%s),\n", + run->exit_reason, + exit_reason_str(run->exit_reason)); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT_3(uc, "0x%lx 0x%lx 0x%lx"); + break; + case UCALL_DONE: + goto done; + default: + TEST_FAIL("Unknown ucall %lu", uc.cmd); + } + } + +done: + kvm_vm_free(vm); + return 0; +} -- cgit v1.2.3 From 20aef201dafba6a1ffe9daa145c7f2c525b74aae Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Fri, 14 Apr 2023 09:08:09 +0100 Subject: KVM: selftests: Fix spelling mistake "perrmited" -> "permitted" There is a spelling mistake in a test report message. Fix it. Signed-off-by: Colin Ian King Link: https://lore.kernel.org/r/20230414080809.1678603-1-colin.i.king@gmail.com Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/lib/x86_64/processor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tools/testing') diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c b/tools/testing/selftests/kvm/lib/x86_64/processor.c index 898b30096c80..d4a0b504b1e0 100644 --- a/tools/testing/selftests/kvm/lib/x86_64/processor.c +++ b/tools/testing/selftests/kvm/lib/x86_64/processor.c @@ -731,7 +731,7 @@ void __vm_xsave_require_permission(uint64_t xfeature, const char *name) rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_GUEST_PERM, &bitmask); TEST_ASSERT(rc == 0, "prctl(ARCH_GET_XCOMP_GUEST_PERM) error: %ld", rc); TEST_ASSERT(bitmask & xfeature, - "'%s' (0x%lx) not permitted after prctl(ARCH_REQ_XCOMP_GUEST_PERM) perrmited=0x%lx", + "'%s' (0x%lx) not permitted after prctl(ARCH_REQ_XCOMP_GUEST_PERM) permitted=0x%lx", name, xfeature, bitmask); } -- cgit v1.2.3