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authoryanggq <yanggq@LServer2.(none)>2012-06-14 09:32:14 +0400
committeryanggq <yanggq@LServer2.(none)>2012-06-14 09:32:14 +0400
commit1af454cdfb023f0d46ef83cb40dcaa3bd1468686 (patch)
tree6becc9bb1132adf3e4e193b7bae5eec28ea47f59
parent358faa06058a45c722eef751ccfc5806891d79ed (diff)
downloadlinux-sunxi-lichee/a1x_super_standby_dev.tar.xz
super standby: merge dev modified fileslichee/a1x_super_standby_dev
-rwxr-xr-xarch/arm/mach-sun5i/include/mach/dram.h2
-rwxr-xr-xarch/arm/mach-sun5i/pm/mem_cpu.c2
-rwxr-xr-xarch/arm/mach-sun5i/pm/pm.c130
-rwxr-xr-xarch/arm/mach-sun5i/pm/pm.h6
-rwxr-xr-xarch/arm/mach-sun5i/pm/pm_config.h2
-rwxr-xr-xarch/arm/mach-sun5i/pm/pm_debug.c48
-rwxr-xr-xarch/arm/mach-sun5i/pm/pm_debug.h4
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/common.c6
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/dram/dram.c4
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/standby.c46
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/dram/dram.c31
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/dram/dram_i.h2
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/dram/dram_init.c146
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/resume/resume1.c4
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/stack.S29
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/super_clock.c1
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/super_delay.S4
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/super_power.c146
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/super_power.h10
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/super_twi.c99
-rwxr-xr-xarch/arm/mach-sun5i/pm/standby/super/suspend/suspend.c230
-rwxr-xr-xdrivers/base/power/main.c40
-rwxr-xr-xdrivers/block/sun5i_nand/nfd/nand_blk.c2
-rwxr-xr-xdrivers/block/sun5i_nand/src/boot0/nfc_for_boot0.c5
-rwxr-xr-xdrivers/block/sun5i_nand/src/include/nand_drv_cfg.h2
-rwxr-xr-xdrivers/block/sun5i_nand/src/nfc/nfc_r.c5
-rwxr-xr-xdrivers/input/keyboard/sw-keyboard.c4
-rwxr-xr-xdrivers/input/touchscreen/gt818_ts.c176
-rwxr-xr-xdrivers/power/axp_power/axp-mfd.c21
-rwxr-xr-xdrivers/power/axp_power/axp-sply.h19
-rwxr-xr-xdrivers/power/axp_power/axp20-sply-cou.c61
-rwxr-xr-xdrivers/power/axp_power/axp20-sply.c40
-rwxr-xr-xdrivers/rtc/rtc-sun5i.c21
-rwxr-xr-xdrivers/video/sun5i/disp/de_bsp/bsp_display.h1
-rwxr-xr-xdrivers/video/sun5i/disp/dev_disp.c150
-rwxr-xr-xdrivers/video/sun5i/disp/dev_disp.h1
-rwxr-xr-xinclude/linux/drv_display_sun4i.h1
-rwxr-xr-xinclude/linux/mfd/axp-mfd.h6
-rwxr-xr-xinclude/linux/printk.h23
-rwxr-xr-xkernel/power/earlysuspend.c31
-rwxr-xr-xkernel/power/suspend.c27
41 files changed, 1035 insertions, 553 deletions
diff --git a/arch/arm/mach-sun5i/include/mach/dram.h b/arch/arm/mach-sun5i/include/mach/dram.h
index 88449ff75715..5cef71c48b63 100755
--- a/arch/arm/mach-sun5i/include/mach/dram.h
+++ b/arch/arm/mach-sun5i/include/mach/dram.h
@@ -60,7 +60,7 @@ void dram_exit_power_down(void);
void dram_hostport_on_off(unsigned int port_idx, unsigned int on);
unsigned int dram_hostport_check_ahb_fifo_status(unsigned int port_idx);
void dram_hostport_setup(unsigned int port, unsigned int prio, unsigned int wait_cycle, unsigned int cmd_num);
-void dram_power_save_process(void);
+int dram_power_save_process(void);
unsigned int dram_power_up_process(void);
diff --git a/arch/arm/mach-sun5i/pm/mem_cpu.c b/arch/arm/mach-sun5i/pm/mem_cpu.c
index 4fd6b9b15e6c..a861843fdd88 100755
--- a/arch/arm/mach-sun5i/pm/mem_cpu.c
+++ b/arch/arm/mach-sun5i/pm/mem_cpu.c
@@ -90,7 +90,7 @@ void __save_processor_state(struct saved_context *ctxt)
asm volatile ("mrc p15, 0, %0, c1, c0, 2" : "=r"(ctxt->cacr));
#elif defined(CORTEX_A9)
asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r"(ctxt->cr));
- busy_waiting();
+ //busy_waiting();
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r"(ctxt->actlr));
asm volatile ("mrc p15, 0, %0, c1, c0, 2" : "=r"(ctxt->cacr));
asm volatile ("mrc p15, 0, %0, c1, c1, 1" : "=r"(ctxt->sder));
diff --git a/arch/arm/mach-sun5i/pm/pm.c b/arch/arm/mach-sun5i/pm/pm.c
index b43c68dfdee7..8f26898acb5f 100755
--- a/arch/arm/mach-sun5i/pm/pm.c
+++ b/arch/arm/mach-sun5i/pm/pm.c
@@ -108,11 +108,10 @@ __u32 mem_dram_backup_area1[DRAM_BACKUP_SIZE1];
__u32 mem_dram_backup_area2[DRAM_BACKUP_SIZE2]; //for training area
__u32 mem_dram_backup_compare_area2[DRAM_COMPARE_SIZE]; //for compare area
#else
-static __u32 *mem_dram_traning_area_back = NULL;
+//static __u32 *mem_dram_traning_area_back = NULL;
static __u32 *mem_dram_backup_area = NULL;
static __u32 *mem_dram_backup_area1 = NULL;
static __u32 *mem_dram_backup_area2 = NULL;
-static __u32 *mem_dram_backup_compare_area2 = NULL;
#endif
#ifdef CONFIG_CPU_FREQ_USR_EVNT_NOTIFY
@@ -180,6 +179,8 @@ volatile int print_flag = 0;
static bool mem_allocated_flag = false;
static int dram_backup = 0;
static int standby_mode = 0;
+static int suspend_status_flag = 0;
+
extern void create_mapping(struct map_desc *md);
extern void save_mapping(unsigned long vaddr);
@@ -233,11 +234,21 @@ static int aw_pm_valid(suspend_state_t state)
//allocat space for backup dram data
if((false == mem_allocated_flag) && (SUPER_STANDBY == standby_type)){
- mem_dram_traning_area_back = (__u32*)kmalloc(sizeof(__u32)*DRAM_TRANING_SIZE, GFP_KERNEL);
mem_dram_backup_area = (__u32*)kmalloc(sizeof(__u32)*DRAM_BACKUP_SIZE, GFP_KERNEL);
+ if(!mem_dram_backup_area){
+ goto malloc_mem_dram_backup_area_err;
+ }
+
mem_dram_backup_area1 = (__u32*)kmalloc(sizeof(__u32)*DRAM_BACKUP_SIZE1, GFP_KERNEL);
+ if(!mem_dram_backup_area1){
+ goto malloc_mem_dram_backup_area1_err;
+ }
+
mem_dram_backup_area2 = (__u32*)kmalloc(sizeof(__u32)*DRAM_BACKUP_SIZE2, GFP_KERNEL);
- mem_dram_backup_compare_area2 = (__u32*)kmalloc(sizeof(__u32)*DRAM_COMPARE_SIZE, GFP_KERNEL);
+ if(!mem_dram_backup_area2){
+ goto malloc_mem_dram_backup_area2_err;
+ }
+
mem_allocated_flag = true;
#ifdef GET_CYCLE_CNT
// init counters:
@@ -247,6 +258,16 @@ static int aw_pm_valid(suspend_state_t state)
//print_flag = 0;
return 1;
+
+malloc_mem_dram_backup_area2_err:
+ kfree(mem_dram_backup_area1);
+malloc_mem_dram_backup_area1_err:
+ kfree(mem_dram_backup_area);
+malloc_mem_dram_backup_area_err:
+ mem_allocated_flag = false;
+
+ return 0;
+
}
@@ -336,11 +357,16 @@ int aw_pm_prepare_late(void)
*
*Return : return 0 is process successed;
*
-*Notes :
+*Notes : -1: data is ok;
+* -2: data has been destory.
*********************************************************************************************************
*/
static int aw_early_suspend(void)
{
+#define MAX_RETRY_TIMES (5)
+
+ __s32 retry = MAX_RETRY_TIMES;
+
//backup device state
mem_ccu_save((__ccmu_reg_list_t *)(SW_VA_CCM_IO_BASE));
mem_clk_save(&(saved_clk_state));
@@ -353,8 +379,24 @@ static int aw_early_suspend(void)
//backup volt and freq state, after backup device state
mem_twi_init(AXP_IICBUS);
/* backup voltages */
- mem_para_info.suspend_dcdc2 = mem_get_voltage(POWER_VOL_DCDC2);
- mem_para_info.suspend_dcdc3 = mem_get_voltage(POWER_VOL_DCDC3);
+ while(-1 == (mem_para_info.suspend_dcdc2 = mem_get_voltage(POWER_VOL_DCDC2)) && --retry){
+ ;
+ }
+ if(0 == retry){
+ return -1;
+ }else{
+ retry = MAX_RETRY_TIMES;
+ }
+
+ while(-1 == (mem_para_info.suspend_dcdc3 = mem_get_voltage(POWER_VOL_DCDC3)) && --retry){
+ ;
+ }
+ if(0 == retry){
+ return -1;
+ }else{
+ retry = MAX_RETRY_TIMES;
+ }
+
/*backup bus ratio*/
mem_clk_getdiv(&mem_para_info.clk_div);
/*backup pll ration*/
@@ -434,7 +476,7 @@ static int aw_early_suspend(void)
mem();
#endif
- return -1;
+ return -2;
}
@@ -458,7 +500,7 @@ static int verify_restore(void *src, void *dest, int count)
while(count--){
if(*(s+(count)) != *(d+(count))){
- busy_waiting();
+ //busy_waiting();
return -1;
}
}
@@ -506,18 +548,18 @@ static void aw_late_resume(void)
if(0 != (ret = (verify_restore((void *)mem_dram_backup_area2, (void *)DRAM_BACKUP_BASE_ADDR2, sizeof(__u32)*DRAM_BACKUP_SIZE2)))){
save_mem_status(LATE_RESUME_START |0x21);
save_sun5i_mem_status(LATE_RESUME_START | 0x31);
- busy_waiting();
+ //busy_waiting();
}
if(0 != (ret = verify_restore((void *)mem_dram_backup_area1, (void *)DRAM_BACKUP_BASE_ADDR1, sizeof(__u32)*DRAM_BACKUP_SIZE1))){
save_mem_status(LATE_RESUME_START |0x22);
save_sun5i_mem_status(LATE_RESUME_START | 0x32);
- busy_waiting();
+ //busy_waiting();
}
if(0 != (ret = verify_restore((void *)mem_dram_backup_area, (void *)DRAM_BACKUP_BASE_ADDR, sizeof(__u32)*DRAM_BACKUP_SIZE))){
save_mem_status(LATE_RESUME_START |0x23);
save_sun5i_mem_status(LATE_RESUME_START | 0x33);
- busy_waiting();
+ //busy_waiting();
}
#endif
@@ -533,6 +575,31 @@ static void aw_late_resume(void)
return;
}
+void check_int_src(void)
+{
+#define INT_REG_0 (0x10)
+#define INT_REG_1 (0x14)
+#define INT_REG_2 (0x18)
+
+
+ u32 data_0 = 0;
+ u32 data_1 = 0;
+ u32 data_2 = 0;
+
+ data_0 = *(volatile unsigned int *)(SW_VA_INT_IO_BASE + INT_REG_0);
+ data_1 = *(volatile unsigned int *)(SW_VA_INT_IO_BASE + INT_REG_1);
+ data_2 = *(volatile unsigned int *)(SW_VA_INT_IO_BASE + INT_REG_2);
+
+ pr_info("INT_REG_0 = %d \n", data_0);
+ pr_info("INT_REG_1 = %d \n", data_1);
+ pr_info("INT_REG_2 = %d \n", data_2);
+
+ return;
+
+}
+
+
+
/*
*********************************************************************************************************
* aw_pm_enter
@@ -550,6 +617,9 @@ static int aw_pm_enter(suspend_state_t state)
{
asm volatile ("stmfd sp!, {r1-r12, lr}" );
int (*standby)(struct aw_pm_info *arg) = 0;
+ int result = 0;
+
+ suspend_status_flag = 0;
PM_DBG("enter state %d\n", state);
if(NORMAL_STANDBY== standby_type){
@@ -560,6 +630,7 @@ static int aw_pm_enter(suspend_state_t state)
standby_info.standby_para.event = SUSPEND_WAKEUP_SRC_EXINT | SUSPEND_WAKEUP_SRC_ALARM;
/* goto sram and run */
standby(&standby_info);
+ check_int_src();
}else if(SUPER_STANDBY == standby_type){
mem_enter:
if( 1 == mem_para_info.mem_flag){
@@ -579,18 +650,35 @@ mem_enter:
mem_para_info.mem_flag = 1;
standby_level = STANDBY_WITH_POWER_OFF;
mem_para_info.resume_pointer = (void *)&&mem_enter;
- if(0 != aw_early_suspend()){
- mem_para_info.mem_flag = 0;
- return -1;
+ //busy_waiting();
+ result = aw_early_suspend();
+ if(-2 == result){
+ //mem_para_info.mem_flag = 1;
+ //busy_waiting();
+ suspend_status_flag = 2;
+ goto mem_enter;
+ }else if(-1 == result){
+ suspend_status_flag = 1;
+ goto suspend_err;
}
resume:
+
+#ifdef IO_MEASURE
+ io_init();
+ io_high(0);
+#endif
aw_late_resume();
save_sun5i_mem_status(dram_backup);
+ //have been disable dcache in resume1
enable_cache();
}
+suspend_err:
+
+ pr_info("suspend_status_flag = %d. \n", suspend_status_flag);
+
asm volatile ("ldmfd sp!, {r1-r12, lr}" );
return 0;
}
@@ -657,11 +745,19 @@ void aw_pm_end(void)
//standby_type = NON_STANDBY;
//uart_init(2, 115200);
- save_mem_status(LATE_RESUME_START |0x10);
+ //save_mem_status(LATE_RESUME_START |0x10);
//print_flag = 0;
#ifndef GET_CYCLE_CNT
+ #ifndef IO_MEASURE
restore_perfcounter();
+ #endif
#endif
+
+#ifdef IO_MEASURE
+ io_init();
+ io_high(1);
+#endif
+
PM_DBG("aw_pm_end!\n");
}
@@ -755,11 +851,9 @@ static void __exit aw_pm_exit(void)
{
PM_DBG("aw_pm_exit!\n");
if(true == mem_allocated_flag){
- kfree(mem_dram_traning_area_back);
kfree(mem_dram_backup_area);
kfree(mem_dram_backup_area1);
kfree(mem_dram_backup_area2);
- kfree(mem_dram_backup_compare_area2);
mem_allocated_flag = false;
}
suspend_set_ops(NULL);
diff --git a/arch/arm/mach-sun5i/pm/pm.h b/arch/arm/mach-sun5i/pm/pm.h
index 66d4b26df51a..6d5ef19554c6 100755
--- a/arch/arm/mach-sun5i/pm/pm.h
+++ b/arch/arm/mach-sun5i/pm/pm.h
@@ -54,9 +54,9 @@ struct mmu_state {
struct aw_mem_para{
void **resume_pointer;
__u32 mem_flag;
- //__u32 suspend_vdd;
- __u32 suspend_dcdc2;
- __u32 suspend_dcdc3;
+ //__s32 suspend_vdd;
+ __s32 suspend_dcdc2;
+ __s32 suspend_dcdc3;
__u32 suspend_freq;
struct clk_div_t clk_div;
struct pll_factor_t pll_factor;
diff --git a/arch/arm/mach-sun5i/pm/pm_config.h b/arch/arm/mach-sun5i/pm/pm_config.h
index 51a45cf8f178..9d18df66d19c 100755
--- a/arch/arm/mach-sun5i/pm/pm_config.h
+++ b/arch/arm/mach-sun5i/pm/pm_config.h
@@ -45,7 +45,7 @@
#define RUNTIME_CONTEXT_SIZE (14 * sizeof(__u32)) //r0-r13
#define DRAM_COMPARE_DATA_ADDR (0xc0100000) //1Mbytes offset
-#define DRAM_COMPARE_SIZE (0x200000) //16K*4 bytes = 64K.
+#define DRAM_COMPARE_SIZE (0x10000) //?
//for mem mapping
diff --git a/arch/arm/mach-sun5i/pm/pm_debug.c b/arch/arm/mach-sun5i/pm/pm_debug.c
index 924eacff81eb..bd69076eded3 100755
--- a/arch/arm/mach-sun5i/pm/pm_debug.c
+++ b/arch/arm/mach-sun5i/pm/pm_debug.c
@@ -8,6 +8,12 @@ static __u32 backup_perf_counter_enable_reg = 0;
#define CCU_REG_VA (0xF1c20000)
#define CCU_REG_PA (0x01c20000)
+//for io-measure time
+#define PORT_E_CONFIG (0xf1c20890)
+#define PORT_E_DATA (0xf1c208a0)
+#define PORT_CONFIG PORT_E_CONFIG
+#define PORT_DATA PORT_E_DATA
+
void busy_waiting(void)
{
@@ -254,4 +260,46 @@ void delay_ms(__u32 ms)
return;
}
+/*
+ * notice: dependant with perf counter to delay.
+ */
+void io_init(void)
+{
+ __u32 data;
+ //int loop = 1000;
+ //config port output
+ *(volatile unsigned int *)(PORT_CONFIG) = 0x111111;
+
+ //set port to high
+ data = *(volatile unsigned int *)(PORT_DATA);
+ data |= 0x3f;
+ *(volatile unsigned int *)(PORT_DATA) = data;
+ //delay 10 ms
+ delay_us(10000);
+ //set port to low
+ data &= 0xffffffc0;
+ *(volatile unsigned int *)(PORT_DATA) = data;
+
+ return;
+}
+
+/*
+ * set pa port to high, num range is 0-7;
+ */
+void io_high(int num)
+{
+ __u32 data;
+ data = *(volatile unsigned int *)(PORT_DATA);
+ //pull low 10ms
+ data &= (~(1<<num));
+ *(volatile unsigned int *)(PORT_DATA) = data;
+ delay_us(10000);
+ //pull high
+ data |= (1<<num);
+ *(volatile unsigned int *)(PORT_DATA) = data;
+
+ return;
+}
+
+
diff --git a/arch/arm/mach-sun5i/pm/pm_debug.h b/arch/arm/mach-sun5i/pm/pm_debug.h
index 794d0335e41e..670356a7e699 100755
--- a/arch/arm/mach-sun5i/pm/pm_debug.h
+++ b/arch/arm/mach-sun5i/pm/pm_debug.h
@@ -28,6 +28,7 @@
//#define GET_CYCLE_CNT
+//#define IO_MEASURE
/*
* Check at compile time that something is of a particular type.
@@ -77,6 +78,9 @@ void reset_counter(void);
void change_runtime_env(__u32 mmu_flag);
void delay_us(__u32 us);
void delay_ms(__u32 ms);
+void io_init(void);
+void io_high(int num);
+
#endif /*_PM_DEBUG_H*/
diff --git a/arch/arm/mach-sun5i/pm/standby/common.c b/arch/arm/mach-sun5i/pm/standby/common.c
index 83a7e2c1c193..0c1e831483c0 100755
--- a/arch/arm/mach-sun5i/pm/standby/common.c
+++ b/arch/arm/mach-sun5i/pm/standby/common.c
@@ -37,10 +37,10 @@ void standby_memcpy(void *dest, void *src, int n)
char *tmp_src = (char *)src;
char *tmp_dst = (char *)dest;
- // if(!dest || !src){
+ if(!dest || !src){
/* parameter is invalid */
- // return;
- // }
+ return;
+ }
for( ; n > 0; n--){
*tmp_dst ++ = *tmp_src ++;
diff --git a/arch/arm/mach-sun5i/pm/standby/dram/dram.c b/arch/arm/mach-sun5i/pm/standby/dram/dram.c
index 1b6de4c5d5d3..01238573952f 100755
--- a/arch/arm/mach-sun5i/pm/standby/dram/dram.c
+++ b/arch/arm/mach-sun5i/pm/standby/dram/dram.c
@@ -355,7 +355,7 @@ __s32 DRAMC_retraining(void)
}
}
-void dram_power_save_process(void)
+__s32 dram_power_save_process(void)
{
__u32 reg_val;
@@ -367,6 +367,8 @@ void dram_power_save_process(void)
//disable and reset all DLL
mctl_disable_dll();
+
+ return 0;
}
__u32 dram_power_up_process(void)
{
diff --git a/arch/arm/mach-sun5i/pm/standby/standby.c b/arch/arm/mach-sun5i/pm/standby/standby.c
index 536eae0d4a06..a040deaaae45 100755
--- a/arch/arm/mach-sun5i/pm/standby/standby.c
+++ b/arch/arm/mach-sun5i/pm/standby/standby.c
@@ -42,7 +42,28 @@ static __u32 dram_traning_area_back[DRAM_TRANING_SIZE];
#define __reg_value(reg) (*((volatile unsigned int *)(reg)))
static int err_flag;
-static void check_version(void);
+static void check_version(void)
+{
+ err_flag = (__reg_value(0xf1c15000)>>16)&0x7;
+ if(err_flag == 1) {
+ if(__reg_value(0xf1c20064)&(1<<4)) {
+ err_flag = (__reg_value(0xf1c0c048) & 0x07ff) * ((__reg_value(0xf1c0c048)>>16) & 0x07ff);
+ err_flag = (err_flag > 0x321*0x260)? -1 : 0;
+ } else {
+ __reg_value(0xf1c20064) |= (1<<4);
+ err_flag = (__reg_value(0xf1c0c048) & 0x07ff) * ((__reg_value(0xf1c0c048)>>16) & 0x07ff);
+ err_flag = (err_flag > 0x321*0x260)? -1 : 0;
+ __reg_value(0xf1c20064) &= ~(1<<4);
+ }
+ } else {
+ err_flag = 0;
+ }
+
+ if(err_flag) {
+ /* system error */
+ standby_clk_plldisable();
+ }
+}
/*
@@ -259,26 +280,3 @@ static void standby(void)
return;
}
-static void check_version(void)
-{
- err_flag = (__reg_value(0xf1c15000)>>16)&0x7;
- if(err_flag == 1) {
- if(__reg_value(0xf1c20064)&(1<<4)) {
- err_flag = (__reg_value(0xf1c0c048) & 0x07ff) * ((__reg_value(0xf1c0c048)>>16) & 0x07ff);
- err_flag = (err_flag > 0x321*0x260)? -1 : 0;
- } else {
- __reg_value(0xf1c20064) |= (1<<4);
- err_flag = (__reg_value(0xf1c0c048) & 0x07ff) * ((__reg_value(0xf1c0c048)>>16) & 0x07ff);
- err_flag = (err_flag > 0x321*0x260)? -1 : 0;
- __reg_value(0xf1c20064) &= ~(1<<4);
- }
- } else {
- err_flag = 0;
- }
-
- if(err_flag) {
- /* system error */
- standby_clk_plldisable();
- }
-}
-
diff --git a/arch/arm/mach-sun5i/pm/standby/super/dram/dram.c b/arch/arm/mach-sun5i/pm/standby/super/dram/dram.c
index 4f9d8897b9ed..b772e77e805d 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/dram/dram.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/dram/dram.c
@@ -11,6 +11,7 @@
*/
#include "dram_i.h"
+static __s32 backup_dram_cal_val(void);
/*
*********************************************************************************************************
@@ -358,38 +359,52 @@ __s32 DRAMC_retraining(void)
/*
* backup dram calibration value
*/
-void backup_dram_cal_val(void)
+static __s32 backup_dram_cal_val(void)
{
+
__u32 value;
__u8 reg_addr_1st = 0x0a;
__u8 reg_addr_2nd = 0x0b;
__u8 reg_addr_3rd = 0x0c;
__u8 reg_val;
+
value = mctl_read_w(SDR_ZQSR) & 0xfffff;
//busy_waiting();
reg_val = value&0xff;
if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,reg_addr_1st, &reg_val)){
- busy_waiting();
+ return -1;
}
reg_val = (value>>8)&0xff;
if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,reg_addr_2nd, &reg_val)){
- busy_waiting();
+ return -1;
}
reg_val = (value>>16)&0x0f;
if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,reg_addr_3rd, &reg_val)){
- busy_waiting();
+ return -1;
}
- return;
+ return 0;
}
-void dram_power_save_process(void)
+__s32 dram_power_save_process(void)
{
- backup_dram_cal_val();
+ #define MAX_RETRY_TIMES (5)
+
+ __s32 retry = MAX_RETRY_TIMES;
+
+ //backup_dram_cal_val();
+ while((-1 == backup_dram_cal_val()) && --retry){
+ ;
+ }
+ if(0 == retry){
+ return -1;
+ }else{
+ retry = MAX_RETRY_TIMES;
+ }
//put external SDRAM into self-fresh state
DRAMC_enter_selfrefresh();
@@ -399,6 +414,8 @@ void dram_power_save_process(void)
//disable and reset all DLL
mctl_disable_dll();
+
+ return 0;
}
__u32 dram_power_up_process(void)
{
diff --git a/arch/arm/mach-sun5i/pm/standby/super/dram/dram_i.h b/arch/arm/mach-sun5i/pm/standby/super/dram/dram_i.h
index 1df88cf5f690..6a004022dd51 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/dram/dram_i.h
+++ b/arch/arm/mach-sun5i/pm/standby/super/dram/dram_i.h
@@ -92,6 +92,8 @@ extern void mctl_enable_dll0(void);
extern void mctl_enable_dllx(void);
extern void mctl_disable_dll(void);
extern void DRAMC_hostport_on_off(__u32 port_idx, __u32 on);
+extern __s32 init_DRAM(void);
+
#endif //__DRAM_REG_H__
diff --git a/arch/arm/mach-sun5i/pm/standby/super/dram/dram_init.c b/arch/arm/mach-sun5i/pm/standby/super/dram/dram_init.c
index e1d5ed5a7e14..bae27c21faa5 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/dram/dram_init.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/dram/dram_init.c
@@ -12,8 +12,118 @@
*/
#include "dram_i.h"
-typedef struct dram_para_t __dram_para_t;
+typedef struct _boot_dram_para_t
+{
+ __u32 dram_baseaddr;
+ __u32 dram_clk;
+ __u32 dram_type;
+ __u32 dram_rank_num;
+ __u32 dram_chip_density;
+ __u32 dram_io_width;
+ __u32 dram_bus_width;
+ __u32 dram_cas;
+ __u32 dram_zq;
+ __u32 dram_odt_en;
+ __u32 dram_size;
+ __u32 dram_tpr0;
+ __u32 dram_tpr1;
+ __u32 dram_tpr2;
+ __u32 dram_tpr3;
+ __u32 dram_tpr4;
+ __u32 dram_tpr5;
+ __u32 dram_emr1;
+ __u32 dram_emr2;
+ __u32 dram_emr3;
+}boot_dram_para_t;
+
+/******************************************************************************/
+/* file head of Boot */
+/******************************************************************************/
+typedef struct _Boot_file_head
+{
+ __u32 jump_instruction; // one intruction jumping to real code
+ __u8 magic[8]; // ="eGON.BT0" or "eGON.BT1", not C-style string.
+ __u32 check_sum; // generated by PC
+ __u32 length; // generated by PC
+ __u32 pub_head_size; // the size of boot_file_head_t
+ __u8 pub_head_vsn[4]; // the version of boot_file_head_t
+ __u8 file_head_vsn[4]; // the version of boot0_file_head_t or boot1_file_head_t
+ __u8 Boot_vsn[4]; // Boot version
+ __u8 eGON_vsn[4]; // eGON version
+ __u8 platform[8]; // platform information
+}boot_file_head_t;
+
+
+typedef struct _boot_para_info_t
+{
+ __u8 blkmagic[16]; // "ePDK-Magic-Block", not C-style string.
+ __u8 magic[8];
+ __u8 eGON_vsn[4]; // eGON version
+ __u8 Boot_vsn[4]; // Boot version
+ __u32 reserved[20];
+}boot_para_info_t;
+
+//í¨ó?μ?£?oíGPIO?à1?μ?êy?Y?á11
+typedef struct _normal_gpio_cfg
+{
+ __u8 port; //???úo?
+ __u8 port_num; //???ú?ú±ào?
+ __s8 mul_sel; //1|?ü±ào?
+ __s8 pull; //μ?×è×′ì?
+ __s8 drv_level; //?y?ˉ?y?ˉ?üá|
+ __s8 data; //ê?3?μ???
+ __u8 reserved[2]; //±£á???£?±£?¤????
+}
+normal_gpio_cfg;
+/******************************************************************************/
+/* file head of Boot0 */
+/******************************************************************************/
+typedef struct _boot0_private_head_t
+{
+ __u32 prvt_head_size;
+ char prvt_head_vsn[4]; // the version of boot0_private_head_t
+ boot_dram_para_t dram_para; // DRAM patameters for initialising dram. Original values is arbitrary,
+ __s32 uart_port; // UART?????÷±ào?
+ normal_gpio_cfg uart_ctrl[2]; // UART?????÷(μ÷ê?′òó??ú)êy?YD??¢
+ __s32 enable_jtag; // 1 : enable, 0 : disable
+ normal_gpio_cfg jtag_gpio[5]; // ±£′?JTAGμ?è?2?GPIOD??¢
+ normal_gpio_cfg storage_gpio[32]; // ′?′¢éè±? GPIOD??¢
+ char storage_data[512 - sizeof(normal_gpio_cfg) * 32]; // ó??§±£á?êy?YD??¢
+ //boot_nand_connect_info_t nand_connect_info;
+}boot0_private_head_t;
+
+
+typedef struct _boot0_file_head_t
+{
+ boot_file_head_t boot_head;
+ boot0_private_head_t prvt_head;
+}boot0_file_head_t;
+
+typedef boot_dram_para_t __dram_para_t;
+
+static boot_dram_para_t tmp = {
+ 0x40000000,
+ 360,
+ 3,
+ 2,
+ 2048,
+ 16,
+ 32,
+ 6,
+ 0x7b,
+ 0,
+ 512,
+ 0x30926692,
+ 0x1090,
+ 0x1a0c8,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0
+};
/*
*********************************************************************************************************
@@ -527,6 +637,40 @@ __s32 dram_init(void)
return 0;
}
+
+void get_boot0_dram_para( boot_dram_para_t *boot0_dram_para_p )
+{
+ mem_memcpy( (void *)boot0_dram_para_p, (void *)&(tmp), sizeof(boot_dram_para_t) );
+ //memcpy( boot0_dram_para_p, &(tmp), sizeof(boot_dram_para_t) );
+ return;
+}
+
+__s32 init_DRAM(void)
+{
+ __u32 i;
+ __s32 ret_val;
+ boot_dram_para_t boot0_para;
+
+ get_boot0_dram_para( &boot0_para );
+ if(boot0_para.dram_clk > 2000)
+ {
+ boot0_para.dram_clk = mem_uldiv(boot0_para.dram_clk, 1000000);
+ //boot0_para.dram_clk /= 1000000;
+ }
+
+ ret_val = 0;
+ i = 0;
+ save_mem_status(SUSPEND_START + 0x10);
+ while( (ret_val == 0) && (i<4) )
+ {
+ ret_val = DRAMC_init( &boot0_para );
+ i++;
+ }
+ save_mem_status(SUSPEND_START + 0x11);
+ return ret_val;
+}
+
+
__s32 dram_exit(void)
{
return DRAMC_exit();
diff --git a/arch/arm/mach-sun5i/pm/standby/super/resume/resume1.c b/arch/arm/mach-sun5i/pm/standby/super/resume/resume1.c
index c1cc63b59573..cf51700a9f44 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/resume/resume1.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/resume/resume1.c
@@ -24,7 +24,7 @@ static struct aw_mem_para mem_para_info;
extern char *__bss_start;
extern char *__bss_end;
-static __u32 dcdc2, dcdc3;
+static __s32 dcdc2, dcdc3;
static __u32 sp_backup;
static char *tmpPtr = (char *)&__bss_start;
static __u32 status = 0;
@@ -166,7 +166,7 @@ void restore_ccmu(void)
while( 0 != mem_set_voltage(POWER_VOL_DCDC2, dcdc2)){
;
- }
+ }
while(0 != mem_set_voltage(POWER_VOL_DCDC3, dcdc3)){
;
}
diff --git a/arch/arm/mach-sun5i/pm/standby/super/stack.S b/arch/arm/mach-sun5i/pm/standby/super/stack.S
index 6f80152cbec0..c8df4d02e80d 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/stack.S
+++ b/arch/arm/mach-sun5i/pm/standby/super/stack.S
@@ -367,6 +367,11 @@ disable_mmu:
BIC r1, #0x1000
BIC r1, #0x0007
BIC r1, #0x
+ b __turn_mmu_off
+ .align 5
+
+ .type __turn_mmu_off, %function
+__turn_mmu_off:
/*write cr: disable cache and mmu*/
MCR p15,0,r1,c1,c0,0
/*read id reg*/
@@ -375,3 +380,27 @@ disable_mmu:
mov r3, r3
/*return*/
mov pc, lr
+
+ .text
+ .globl enable_mmu
+enable_mmu:
+ /*read cr*/
+ MRC p15,0,r1,c1,c0,0
+ ORR r1, #0x1000
+ ORR r1, #0x0007
+ ORR r1, #0x
+ b __turn_mmu_on
+ .align 5
+
+ .type __turn_mmu_on, %function
+__turn_mmu_on:
+ /*write cr: disable cache and mmu*/
+ MCR p15,0,r1,c1,c0,0
+ /*read id reg*/
+ mrc p15, 0, r3, c0, c0, 0
+ mov r3, r3
+ mov r3, r3
+ /*return*/
+ mov pc, lr
+
+
diff --git a/arch/arm/mach-sun5i/pm/standby/super/super_clock.c b/arch/arm/mach-sun5i/pm/standby/super/super_clock.c
index f15deab1aa84..402b1ab73d30 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/super_clock.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/super_clock.c
@@ -20,7 +20,6 @@
static __ccmu_reg_list_t *CmuReg;;
-static __u32 ccu_reg_back[7];
__u32 cpu_ms_loopcnt;
//==============================================================================
diff --git a/arch/arm/mach-sun5i/pm/standby/super/super_delay.S b/arch/arm/mach-sun5i/pm/standby/super/super_delay.S
index b7dd426ec3f3..0ea99d9be5cb 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/super_delay.S
+++ b/arch/arm/mach-sun5i/pm/standby/super/super_delay.S
@@ -1,4 +1,6 @@
-#include "./../pm_config.h"
+#include "./../../pm_config.h"
+
+#define ENABLE_SUPER_STANDBY
#ifdef ENABLE_SUPER_STANDBY
#define STANDBY_COEFFICIENT (17)
diff --git a/arch/arm/mach-sun5i/pm/standby/super/super_power.c b/arch/arm/mach-sun5i/pm/standby/super/super_power.c
index 67d3efdf2d32..5a1dbbcf8889 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/super_power.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/super_power.c
@@ -139,7 +139,7 @@ __s32 mem_set_voltage(enum power_vol_type_e type, __s32 voltage)
*
*********************************************************************************************************
*/
-__u32 mem_get_voltage(enum power_vol_type_e type)
+__s32 mem_get_voltage(enum power_vol_type_e type)
{
struct axp_info *info = 0;
__u8 val, mask;
@@ -149,7 +149,9 @@ __u32 mem_get_voltage(enum power_vol_type_e type)
return -1;
}
- twi_byte_rw(TWI_OP_RD,AXP_ADDR,info->vol_reg, &val);
+ if(twi_byte_rw(TWI_OP_RD,AXP_ADDR,info->vol_reg, &val)){
+ return -1;
+ }
mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
val = (val & mask) >> info->vol_shift;
@@ -168,40 +170,44 @@ __u32 mem_get_voltage(enum power_vol_type_e type)
*
* Arguments : none;
*
-* Returns : result;
+* Returns : 0: succeed;
+* -1: failed;
*********************************************************************************************************
*/
-void mem_power_init(void)
+__s32 mem_power_init(void)
{
- __u8 val, mask, reg_val;
- __s32 i;
+ __u8 reg_val;
save_mem_status(TWI_TRANSFER_STATUS );
#if(AXP_WAKEUP & AXP_WAKEUP_KEY)
/* enable power key long/short */
if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN3, &reg_val)){
- save_mem_status(TWI_TRANSFER_STATUS | 0x01);
- busy_waiting();
+ return -1;
}
reg_val |= 0x03;
if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN3, &reg_val) ){
- save_mem_status(TWI_TRANSFER_STATUS | 0x02);
- busy_waiting();
+ return -1;
}
#endif
#if(AXP_WAKEUP & AXP_WAKEUP_LOWBATT)
/* enable low voltage warning */
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN4, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN4, &reg_val)){
+ return -1;
+ }
reg_val |= 0x03;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN4, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN4, &reg_val)){
+ return -1;
+ }
/* clear pending */
reg_val = 0x03;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQ4, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQ4, &reg_val)){
+ return -1;
+ }
#endif
- return;
+ return 0;
}
/*
@@ -212,10 +218,11 @@ void mem_power_init(void)
*
* Arguments : none;
*
-* Returns : result;
+* Returns : 0: succeed;
+* -1: failed;
*********************************************************************************************************
*/
-void mem_power_exit(void)
+__s32 mem_power_exit(void)
{
__u8 reg_val;
@@ -223,30 +230,36 @@ void mem_power_exit(void)
/*把44H寄存器的bit5, bit6(按键上升沿触发、下降沿触发)置0*/
if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x44, &reg_val)){
- save_mem_status(TWI_TRANSFER_STATUS |0x04);
- busy_waiting();
+ return -1;
}
reg_val &= ~0x60;
if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x44, &reg_val)){
- save_mem_status(TWI_TRANSFER_STATUS |0x05);
- busy_waiting();
+ return -1;
}
#if(AXP_WAKEUP & AXP_WAKEUP_KEY)
/* disable pek long/short */
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN3, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN3, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x03;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN3, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN3, &reg_val)){
+ return -1;
+ }
#endif
#if(AXP_WAKEUP & AXP_WAKEUP_LOWBATT)
/* disable low voltage warning */
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN4, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,AXP20_IRQEN4, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x03;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN4, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,AXP20_IRQEN4, &reg_val)){
+ return -1;
+ }
#endif
- return;
+ return 0;
}
/*
@@ -258,47 +271,65 @@ void mem_power_exit(void)
*
* Arguments : none;
*
- * Returns : result;
+ * Returns : 0: succeed;
+ * -1: failed;
*/
-void mem_power_off(void)
+__s32 mem_power_off(void)
{
__u8 reg_val = 0;
/*config wakeup signal*/
/*把31H寄存器的bit3(按键、gpio唤醒位)置1*/
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x31, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x31, &reg_val)){
+ return -1;
+ }
reg_val |= 0x08;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x31, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x31, &reg_val)){
+ return -1;
+ }
/*把44H寄存器的bit5, bit6(按键上升沿触发、下降沿触发)置1*/
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x44, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x44, &reg_val)){
+ return -1;
+ }
reg_val |= 0x60;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x44, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x44, &reg_val)){
+ return -1;
+ }
#if 1
/*power off*/
/*把12H寄存器的bit0、1、3、4、6置0*/
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x5b;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
#endif
#if 0
/*power off*/
/*把12H寄存器的bit1、3、4、6置0*/
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x5a;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
#endif
/* cpu enter sleep, wait wakeup by interrupt */
+ busy_waiting();
asm("WFI");
/*never get here.
*when reach here, mean twi transfer err, and cpu are not shut down.
* wfi have been changed.
*/
- while(1);
+ //while(1);
- return;
+ return -1;
}
/*
@@ -310,35 +341,52 @@ void mem_power_off(void)
*
* Arguments : none;
*
- * Returns : result;
+ * Returns : 0: succeed;
+ * -1: failed;
*/
-void mem_power_off_nommu(void)
+__s32 mem_power_off_nommu(void)
{
__u8 reg_val = 0;
/*config wakeup signal*/
/*把31H寄存器的bit3(按键、gpio唤醒位)置1*/
- twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x31, &reg_val);
+ if(0 != twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x31, &reg_val)){
+ return -1;
+ }
reg_val |= 0x08;
- twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x31, &reg_val);
+ if(twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x31, &reg_val)){
+ return -1;
+ }
/*把44H寄存器的bit5, bit6(按键上升沿触发、下降沿触发)置1*/
- twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x44, &reg_val);
+ if(twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x44, &reg_val)){
+ return -1;
+ }
reg_val |= 0x60;
- twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x44, &reg_val);
+ if(twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x44, &reg_val)){
+ return -1;
+ }
#if 1
/*power off*/
/*把12H寄存器的bit0、1、3、4、6置0*/
- twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw_nommu(TWI_OP_RD, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x5b;
- twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw_nommu(TWI_OP_WR, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
#endif
#if 0
/*power off*/
/*把12H寄存器的bit1、3、4、6置0*/
- twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_RD, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
reg_val &= ~0x5a;
- twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val);
+ if(twi_byte_rw(TWI_OP_WR, AXP_ADDR,0x12, &reg_val)){
+ return -1;
+ }
#endif
/* cpu enter sleep, wait wakeup by interrupt */
@@ -348,9 +396,9 @@ void mem_power_off_nommu(void)
*when reach here, mean twi transfer err, and cpu are not shut down.
* wfi have been changed.
*/
- while(1);
+ //while(1);
- return;
+ return -1;
}
diff --git a/arch/arm/mach-sun5i/pm/standby/super/super_power.h b/arch/arm/mach-sun5i/pm/standby/super/super_power.h
index b28f42dcfc4a..0659db1bd39b 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/super_power.h
+++ b/arch/arm/mach-sun5i/pm/standby/super/super_power.h
@@ -85,13 +85,13 @@ struct axp_info {
#define AXP_WAKEUP (AXP_WAKEUP_KEY | AXP_WAKEUP_LOWBATT | AXP_WAKEUP_USB | AXP_WAKEUP_AC)
-extern void mem_power_init(void);
-extern void mem_power_exit(void);
-extern void mem_power_off(void);
-extern void mem_power_off_nommu(void);
+extern __s32 mem_power_init(void);
+extern __s32 mem_power_exit(void);
+extern __s32 mem_power_off(void);
+extern __s32 mem_power_off_nommu(void);
extern __s32 mem_set_voltage(enum power_vol_type_e type, __s32 voltage);
-extern __u32 mem_get_voltage(enum power_vol_type_e type);
+extern __s32 mem_get_voltage(enum power_vol_type_e type);
#endif /* __SUPER_POWER_H__ */
diff --git a/arch/arm/mach-sun5i/pm/standby/super/super_twi.c b/arch/arm/mach-sun5i/pm/standby/super/super_twi.c
index e48cfc157976..658c0492c42d 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/super_twi.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/super_twi.c
@@ -28,7 +28,66 @@ static __twic_reg_t* TWI_REG_BASE[3] = {
static __u32 TwiClkRegBak = 0;
static __u32 TwiCtlRegBak = 0;
static __twic_reg_t *twi_reg = 0;
+static __ccmu_reg_list_t *CmuReg;
+static __s32 _mem_twi_soft_reset(void);
+static __s32 _mem_twi_soft_reset_nommu(void);
+
+/*
+*********************************************************************************************************
+* mem_twi_soft_reset
+*
+*Description: reset twi transfer.
+*
+*Arguments :
+*
+*Return :
+*
+*********************************************************************************************************
+*/
+static __s32 _mem_twi_soft_reset(void)
+{
+ CmuReg = (__ccmu_reg_list_t *)SW_VA_CCM_IO_BASE;
+ //clk gating off
+ *(volatile __u32 *)&CmuReg->Apb1Gate &= (~0x1);
+ //clk gating on
+ *(volatile __u32 *)&CmuReg->Apb1Gate |= 0x01;
+
+ twi_reg->reg_clkr = (5<<3)|0; //400k, M = 5, N=0;
+
+ twi_reg->reg_reset |= 0x1;
+ while(twi_reg->reg_reset&0x1);
+
+ return 0;
+}
+
+/*
+*********************************************************************************************************
+* _mem_twi_soft_reset_nommu
+*
+*Description: reset twi transfer.
+*
+*Arguments :
+*
+*Return :
+*
+*********************************************************************************************************
+*/
+static __s32 _mem_twi_soft_reset_nommu(void)
+{
+ CmuReg = (__ccmu_reg_list_t *)SW_PA_CCM_IO_BASE;
+ //clk gating off
+ *(volatile __u32 *)&CmuReg->Apb1Gate &= (~0x1);
+ //clk gating on
+ *(volatile __u32 *)&CmuReg->Apb1Gate |= 0x01;
+
+ twi_reg->reg_clkr = (5<<3)|0; //400k, M = 5, N=0;
+
+ twi_reg->reg_reset |= 0x1;
+ while(twi_reg->reg_reset&0x1);
+
+ return 0;
+}
/*
@@ -50,15 +109,15 @@ __s32 mem_twi_init(int group)
TwiCtlRegBak = 0x80&twi_reg->reg_ctl;/* backup INT_EN;no need for BUS_EN(0xc0) */
//twi_reg->reg_clkr = (2<<3)|3; //100k
twi_reg->reg_clkr = (5<<3)|0; //400k, M = 5, N=0;
-
- twi_reg->reg_reset |= 0x1;
-
+
+ twi_reg->reg_reset |= 0x1;
while(twi_reg->reg_reset&0x1);
return 0;
}
+
/*
*********************************************************************************************************
* mem_twi_exit
@@ -146,7 +205,7 @@ static int _mem_twi_stop(void)
*/
void setup_twi_env(void)
{
- __ccmu_reg_list_t *CmuReg;
+
CmuReg = (__ccmu_reg_list_t *)SW_VA_CCM_IO_BASE;
/*clk module : setting clk ratio, enable gating*/
@@ -176,8 +235,8 @@ void setup_twi_env(void)
* data pointer to the data to be read or write;
*
*Return : result;
-* = EPDK_OK, byte read or write successed;
-* = EPDK_FAIL, btye read or write failed!
+* = 0, byte read or write successed;
+* = -1, btye read or write failed!
*********************************************************************************************************
*/
__s32 twi_byte_rw(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *data)
@@ -205,7 +264,7 @@ __s32 twi_byte_rw(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *data)
while((!(twi_reg->reg_ctl & 0x08))&&(--timeout));
if(timeout == 0)
{
- busy_waiting();
+ //busy_waiting();
goto stop_out;
}
state_tmp = twi_reg->reg_status;
@@ -313,9 +372,17 @@ __s32 twi_byte_rw(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *data)
stop_out:
//WRITE: step 5; READ: step 7
//Send Stop
- _mem_twi_stop();
+ if(0 != ret){
+ _mem_twi_soft_reset();
+ }else{
+ if( 0!= _mem_twi_stop()){
+ _mem_twi_soft_reset();
+ }
+ }
+
+ _mem_twi_stop();
- return ret;
+ return ret;
}
/*
@@ -330,8 +397,8 @@ stop_out:
* data pointer to the data to be read or write;
*
*Return : result;
-* = EPDK_OK, byte read or write successed;
-* = EPDK_FAIL, btye read or write failed!
+* = 0, byte read or write successed;
+* = -1, btye read or write failed!
*********************************************************************************************************
*/
__s32 twi_byte_rw_nommu(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *data)
@@ -360,7 +427,7 @@ __s32 twi_byte_rw_nommu(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *dat
while((!(twi_reg->reg_ctl & 0x08))&&(--timeout));
if(timeout == 0)
{
- busy_waiting();
+ //busy_waiting();
goto stop_out;
}
state_tmp = twi_reg->reg_status;
@@ -468,7 +535,13 @@ __s32 twi_byte_rw_nommu(enum twi_op_type_e op, __u8 saddr, __u8 baddr, __u8 *dat
stop_out:
//WRITE: step 5; READ: step 7
//Send Stop
- _mem_twi_stop();
+ if(0 != ret){
+ _mem_twi_soft_reset_nommu();
+ }else{
+ if( 0!= _mem_twi_stop()){
+ _mem_twi_soft_reset_nommu();
+ }
+ }
return ret;
}
diff --git a/arch/arm/mach-sun5i/pm/standby/super/suspend/suspend.c b/arch/arm/mach-sun5i/pm/standby/super/suspend/suspend.c
index 7d0791a5b430..19a68021e89a 100755
--- a/arch/arm/mach-sun5i/pm/standby/super/suspend/suspend.c
+++ b/arch/arm/mach-sun5i/pm/standby/super/suspend/suspend.c
@@ -9,9 +9,12 @@
*/
#include "./../super_i.h"
+#define RETRY_TIMES (5)
extern char *__bss_start;
extern char *__bss_end;
+static int retry = RETRY_TIMES;
+
extern void mem_flush_tlb(void);
extern void flush_icache(void);
extern void flush_dcache(void);
@@ -24,7 +27,12 @@ extern void mem_flush_tlb(void);
extern void mem_preload_tlb(void);
void disable_cache_invalidate(void);
void disable_mmu(void);
+void enable_mmu(void);
void set_ttbr0(void);
+static __s32 suspend_with_nommu(void);
+static __s32 suspend_with_mmu(void);
+
+
#ifdef RETURN_FROM_RESUME0_WITH_MMU
#define SWITCH_STACK
@@ -88,7 +96,7 @@ void set_ttbr0(void);
#define FLUSH_TLB
#define FLUSH_ICACHE
#define INVALIDATE_DCACHE
-#define SET_COPRO_DEFAULT
+//#define SET_COPRO_DEFAULT
#endif
#ifdef WATCH_DOG_RESET
@@ -140,52 +148,53 @@ int main(void)
sp_backup = save_sp();
#endif
#endif
- save_mem_status(SUSPEND_START);
+ save_sun5i_mem_status(SUSPEND_START);
/* flush data and instruction tlb, there is 32 items of data tlb and 32 items of instruction tlb,
The TLB is normally allocated on a rotating basis. The oldest entry is always the next allocated */
#ifdef FLUSH_TLB
mem_flush_tlb();
- save_mem_status(SUSPEND_START |0x01);
+ save_sun5i_mem_status(SUSPEND_START |0x01);
#ifdef PRE_DISABLE_MMU
/* preload tlb for mem */
//busy_waiting();
//mem_preload_tlb_nommu(); //0x0000 mapping is not large enough for preload nommu tlb
//eg: 0x01c2.... is not in the 0x0000,0000 range.
mem_preload_tlb();
- save_mem_status(SUSPEND_START |0x02);
+ save_sun5i_mem_status(SUSPEND_START |0x02);
#else
/* preload tlb for mem */
mem_preload_tlb();
- save_mem_status(SUSPEND_START |0x03);
+ save_sun5i_mem_status(SUSPEND_START |0x03);
#endif
#endif
+
/* clear bss segment */
do{*tmpPtr ++ = 0;}while(tmpPtr <= (char *)&__bss_end);
- save_mem_status(SUSPEND_START |0x04);
+ save_sun5i_mem_status(SUSPEND_START |0x04);
/* initialise mem modules */
mem_clk_init();
- save_mem_status(SUSPEND_START |0x05);
+ save_sun5i_mem_status(SUSPEND_START |0x05);
mem_int_init();
- save_mem_status(SUSPEND_START |0x06);
+ save_sun5i_mem_status(SUSPEND_START |0x06);
mem_tmr_init();
- save_mem_status(SUSPEND_START |0x07);
+ save_sun5i_mem_status(SUSPEND_START |0x07);
mem_twi_init(AXP_IICBUS);
- save_mem_status(SUSPEND_START |0x08);
- mem_power_init();
- save_mem_status(SUSPEND_START |0x09);
-
- //just for test
- /*restore pmu config*/
+ save_sun5i_mem_status(SUSPEND_START |0x08);
+
//busy_waiting();
-#ifdef DIRECT_RETRUN
- mem_power_exit();
- save_mem_status(RESUME1_START |0x0b);
+ while(mem_power_init()&&--retry){
+ ;
+ }
+ if(0 == retry){
+ goto mem_power_init_err;
+ }else{
+ retry = RETRY_TIMES;
+ }
+ save_sun5i_mem_status(SUSPEND_START |0x09);
- return 0;
-#endif
/* dram enter self-refresh */
//busy_waiting();
@@ -193,12 +202,13 @@ int main(void)
#ifdef GET_CYCLE_CNT
start = get_cyclecount();
#endif
- dram_power_save_process();
+ if(dram_power_save_process()){
+ goto suspend_dram_err;
+ }
//save_mem_status(SUSPEND_START |0x0c);
/* gating off dram clock */
- //busy_waiting();
- mem_clk_dramgating(0);
+ mem_clk_dramgating(0);
#ifdef GET_CYCLE_CNT
start = get_cyclecount() - start;
//busy_waiting();
@@ -206,111 +216,115 @@ int main(void)
save_mem_status(SUSPEND_START |0x0d);
#endif
-#ifdef INIT_DRAM
- //busy_waiting();
-
- /*init dram*/
- dram_size = init_DRAM( ); // 初始化DRAM
- if(dram_size)
- {
- save_mem_status(SUSPEND_START |0x0e);
- //printk("dram size =%d\n", dram_size);
+#ifdef DISABLE_MMU
+ if(suspend_with_nommu()){
+ goto suspend_err;
}
- else
- {
- save_mem_status(SUSPEND_START |0x0f);
- //printk("initializing SDRAM Fail.\n");
+#else
+ if(suspend_with_mmu()){
+ goto suspend_err;
}
+#endif
+ //notice: never get here, so need watchdog, not busy_waiting.
- save_mem_status(SUSPEND_START |0x10);
- mem_mdelay(100);
-
- //return 0;
-#endif
-#ifdef DISABLE_INVALIDATE_CACHE
- disable_cache_invalidate();
- //busy_waiting();
-#endif
+suspend_err:
+ init_DRAM();
+suspend_dram_err:
+mem_power_init_err:
+
+ while(mem_power_exit()&&--retry){
+ ;
+ }
+ if(0 == retry){
+ return -1;
+ }else{
+ retry = RETRY_TIMES;
+ }
-#ifdef START_WATCH_DOG
- //busy_waiting();
- //start watch dog
- /* enable watch-dog to reset cpu */
- mem_tmr_enable_watchdog();
- save_mem_status(SUSPEND_START |0x11);
- //while(1);
-#endif
+ return -1;
+}
-#ifdef DISABLE_MMU
- disable_mmu();
- mem_flush_tlb();
- save_mem_status_nommu(SUSPEND_START |0x12);
- //after disable mmu, it is time to preload nommu, need to access dram?
- mem_preload_tlb_nommu();
- //while(1);
+__s32 suspend_with_nommu(void)
+{
+ disable_mmu();
+ mem_flush_tlb();
+ save_mem_status_nommu(SUSPEND_START |0x12);
+ //after disable mmu, it is time to preload nommu, need to access dram?
+ mem_preload_tlb_nommu();
+ //while(1);
#ifdef SET_COPRO_DEFAULT
- set_copro_default();
- save_mem_status_nommu(SUSPEND_START |0x13);
- //busy_waiting();
- //fake_busy_waiting();
+ set_copro_default();
+ save_mem_status_nommu(SUSPEND_START |0x13);
+ //busy_waiting();
+ //fake_busy_waiting();
#endif
-
+
#ifdef JUMP_WITH_NOMMU
- save_mem_status_nommu(SUSPEND_START |0x14);
- //before jump, disable mmu
- //busy_waiting();
- //jump_to_resume0_nommu(0x40100000);
- jump_to_resume0(0x40100000);
+ save_mem_status_nommu(SUSPEND_START |0x14);
+ //before jump, disable mmu
+ //busy_waiting();
+ //jump_to_resume0_nommu(0x40100000);
+ jump_to_resume0(0x40100000);
#endif
-
+
#ifdef MEM_POWER_OFF
- /*power off*/
- /*NOTICE: not support to power off yet after disable mmu.
- * because twi use virtual addr.
- */
- mem_power_off_nommu();
- save_mem_status_nommu(SUSPEND_START |0x15);
+ /*power off*/
+ /*NOTICE: not support to power off yet after disable mmu.
+ * because twi use virtual addr.
+ */
+ while(mem_power_off_nommu()&&--retry){
+ ;
+ }
+ if(0 == retry){
+ goto mem_power_off_nommu_err;
+
+ }else{
+ retry = RETRY_TIMES;
+ }
+ save_mem_status_nommu(SUSPEND_START |0x15);
#endif
+ return 0;
-#else
+mem_power_off_nommu_err:
+ enable_mmu();
+ return -1;
+
+}
+__s32 suspend_with_mmu(void)
+{
+
#ifdef SET_COPRO_DEFAULT
- set_copro_default();
- save_mem_status(SUSPEND_START |0x13);
- //busy_waiting();
- //fake_busy_waiting();
+ set_copro_default();
+ save_mem_status(SUSPEND_START |0x13);
+ //busy_waiting();
+ //fake_busy_waiting();
#endif
-
-
+
+
#ifdef MEM_POWER_OFF
- /*power off*/
- //busy_waiting();
- mem_power_off();
- save_mem_status(SUSPEND_START |0x0f);
+ /*power off*/
+ //busy_waiting();
+ while(mem_power_off()&&--retry){
+ ;
+ }
+ if(0 == retry){
+ return -1;
+ }else{
+ retry = RETRY_TIMES;
+ }
+ save_mem_status(SUSPEND_START |0x0f);
#endif
-
+
#ifdef WITH_MMU
- //busy_waiting();
- save_mem_status(SUSPEND_START |0x0f);
- //busy_waiting();
- jump_to_resume0(0xc0100000);
+ //busy_waiting();
+ save_mem_status(SUSPEND_START |0x0f);
+ //busy_waiting();
+ jump_to_resume0(0xc0100000);
#endif
-#endif
- //notice: never get here, so need watchdog, not busy_waiting.
-#ifndef DIRECT_RETRUN
-{
+ return 0;
-#ifdef CONFIG_ARCH_SUN4I
-#if 0
- #define CPU_CONFIG_REG (0X01C20D3C)
- __u32 val = *(volatile __u32 *)(CPU_CONFIG_REG);
- *(volatile __u32 *)(PERMANENT_REG_PA + 0x04) = val;
-#endif
-#endif
- busy_waiting();
-}
-#endif
-
}
+
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index d715d9eee1f4..4282d442d352 100755
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -32,18 +32,6 @@
#include "../base.h"
#include "power.h"
-//#include "./../../../arch/arm/mach-sun5i/pm/pm.h"
-#undef GET_CYCLE_CNT
-
-#ifdef GET_CYCLE_CNT
-static int before_device_resume = 0;
-static int after_device_resume = 0;
-static int before_dpm_resume = 0;
-static int before_dpm_complete = 0;
-static int before_device_suspend = 0;
-static int after_device_suspend = 0;
-#endif
-
/*
* The entries in the dpm_list list are in a depth first order, simply
* because children are guaranteed to be discovered after parents, and
@@ -657,9 +645,7 @@ void dpm_resume(pm_message_t state)
get_device(dev);
if (!is_async(dev)) {
int error;
-#ifdef GET_CYCLE_CNT
- before_device_resume = get_cyclecount();
-#endif
+
mutex_unlock(&dpm_list_mtx);
error = device_resume(dev, state, false);
@@ -667,11 +653,6 @@ void dpm_resume(pm_message_t state)
pm_dev_err(dev, state, "", error);
mutex_lock(&dpm_list_mtx);
-#ifdef GET_CYCLE_CNT
- after_device_resume = get_cyclecount();
- printk("#dev name# = #%s#. #before_device_resume# = #%x#, #after_device_resume# = #%x# \n", \
- (*dev).kobj.name, before_device_resume, after_device_resume);
-#endif
}
if (!list_empty(&dev->power.entry))
list_move_tail(&dev->power.entry, &dpm_prepared_list);
@@ -753,16 +734,7 @@ void dpm_complete(pm_message_t state)
*/
void dpm_resume_end(pm_message_t state)
{
-#ifdef GET_CYCLE_CNT
- before_dpm_resume = get_cyclecount();
- printk("#before_dpm_resume# = #%x#. \n", before_dpm_resume);
-#endif
dpm_resume(state);
-
-#ifdef GET_CYCLE_CNT
- before_dpm_complete = get_cyclecount();
- printk("#before_dpm_complete# = #%x#. \n", before_dpm_complete);
-#endif
dpm_complete(state);
}
EXPORT_SYMBOL_GPL(dpm_resume_end);
@@ -1017,10 +989,6 @@ int dpm_suspend(pm_message_t state)
struct device *dev = to_device(dpm_prepared_list.prev);
get_device(dev);
-
-#ifdef GET_CYCLE_CNT
- before_device_suspend = get_cyclecount();
-#endif
mutex_unlock(&dpm_list_mtx);
error = device_suspend(dev);
@@ -1031,12 +999,6 @@ int dpm_suspend(pm_message_t state)
put_device(dev);
break;
}
-
-#ifdef GET_CYCLE_CNT
- after_device_suspend = get_cyclecount();
- printk("#dev name# = #%s#. #before_device_suspend# = #%x#, #after_device_suspend# = #%x# \n", \
- (*dev).kobj.name, before_device_suspend, after_device_suspend);
-#endif
if (!list_empty(&dev->power.entry))
list_move(&dev->power.entry, &dpm_suspended_list);
put_device(dev);
diff --git a/drivers/block/sun5i_nand/nfd/nand_blk.c b/drivers/block/sun5i_nand/nfd/nand_blk.c
index 0622661ee84e..417dfb394e6a 100755
--- a/drivers/block/sun5i_nand/nfd/nand_blk.c
+++ b/drivers/block/sun5i_nand/nfd/nand_blk.c
@@ -1163,7 +1163,7 @@ static int nand_suspend(struct platform_device *plat_dev, pm_message_t state)
if(i==10){
return -EBUSY;
}else{
- down(&mytr.nand_ops_mutex);
+ down(&mytr.nand_ops_mutex);
NAND_ClkDisable();
NAND_PIORelease();
diff --git a/drivers/block/sun5i_nand/src/boot0/nfc_for_boot0.c b/drivers/block/sun5i_nand/src/boot0/nfc_for_boot0.c
index 74884e44b545..0a9960a2d5bb 100755
--- a/drivers/block/sun5i_nand/src/boot0/nfc_for_boot0.c
+++ b/drivers/block/sun5i_nand/src/boot0/nfc_for_boot0.c
@@ -1126,10 +1126,9 @@ __s32 NFC_ReadRetry(__u32 chip, __u32 retry_count, __u32 read_retry_type)
if((retry_count == 5)||(retry_count == 6))
param[1] = 0;
-
- ret =_vender_set_param(&param[0], &read_retry_reg_adr[0], read_retry_reg_num);
}
-
+
+ ret =_vender_set_param(&param[0], &read_retry_reg_adr[0], read_retry_reg_num);
}
else if((read_retry_mode == 2)||(read_retry_mode == 3))
{
diff --git a/drivers/block/sun5i_nand/src/include/nand_drv_cfg.h b/drivers/block/sun5i_nand/src/include/nand_drv_cfg.h
index 04c8595f05ee..81d8419b3f9e 100755
--- a/drivers/block/sun5i_nand/src/include/nand_drv_cfg.h
+++ b/drivers/block/sun5i_nand/src/include/nand_drv_cfg.h
@@ -41,7 +41,7 @@
#define NAND_VERSION_0 0x02
#define NAND_VERSION_1 0x10
-#define NAND_DRV_DATE 0x20120610
+#define NAND_DRV_DATE 0x20120531
//define the max value of the count of chip select
diff --git a/drivers/block/sun5i_nand/src/nfc/nfc_r.c b/drivers/block/sun5i_nand/src/nfc/nfc_r.c
index f558ae28c791..5cbc44a566c9 100755
--- a/drivers/block/sun5i_nand/src/nfc/nfc_r.c
+++ b/drivers/block/sun5i_nand/src/nfc/nfc_r.c
@@ -1246,10 +1246,9 @@ __s32 NFC_ReadRetry(__u32 chip, __u32 retry_count, __u32 read_retry_type)
if((retry_count == 5)||(retry_count == 6))
param[1] = 0;
-
- ret =_vender_set_param(&param[0], &read_retry_reg_adr[0], read_retry_reg_num);
}
-
+
+ ret =_vender_set_param(&param[0], &read_retry_reg_adr[0], read_retry_reg_num);
}
else if((read_retry_mode == 2)||(read_retry_mode == 3))
{
diff --git a/drivers/input/keyboard/sw-keyboard.c b/drivers/input/keyboard/sw-keyboard.c
index 75ca49f0dadc..d249fd7ad4e4 100755
--- a/drivers/input/keyboard/sw-keyboard.c
+++ b/drivers/input/keyboard/sw-keyboard.c
@@ -177,9 +177,9 @@ static void sun4i_keyboard_suspend(struct early_suspend *h)
/*int ret;
struct sun4i_keyboard_data *ts = container_of(h, struct sun4i_keyboard_data, early_suspend);
*/
-#ifdef PRINT_SUSPEND_INFO
+ #ifdef PRINT_SUSPEND_INFO
printk("[%s] enter standby state: %d. \n", __FUNCTION__, (int)standby_type);
-#endif
+ #endif
if (NORMAL_STANDBY == standby_type) {
diff --git a/drivers/input/touchscreen/gt818_ts.c b/drivers/input/touchscreen/gt818_ts.c
index 3978b0096d06..8a44d0cce2f4 100755
--- a/drivers/input/touchscreen/gt818_ts.c
+++ b/drivers/input/touchscreen/gt818_ts.c
@@ -41,9 +41,9 @@
#include "ctp_platform_ops.h"
#define FOR_TSLIB_TEST
-#define PRINT_INT_INFO
+//#define PRINT_INT_INFO
//#define PRINT_POINT_INFO
-#define PRINT_SUSPEND_INFO
+//#define PRINT_SUSPEND_INFO
#define TEST_I2C_TRANSFER
//#define DEBUG
@@ -469,6 +469,7 @@ static void ctp_reset(void)
{
printk("%s. \n", __func__);
if(gpio_reset_enable){
+ gpio_set_one_pin_io_status(gpio_reset_hdle, 1, "ctp_reset");
if(EGPIO_SUCCESS != gpio_write_one_pin_value(gpio_reset_hdle, 0, "ctp_reset")){
printk("%s: err when operate gpio. \n", __func__);
}
@@ -488,6 +489,7 @@ static void ctp_wakeup(void)
{
printk("%s. \n", __func__);
if(1 == gpio_wakeup_enable){
+ gpio_set_one_pin_io_status(gpio_wakeup_hdle, 1, "ctp_wakeup");
if(EGPIO_SUCCESS != gpio_write_one_pin_value(gpio_wakeup_hdle, 1, "ctp_wakeup")){
printk("%s: err when operate gpio. \n", __func__);
}
@@ -1084,13 +1086,9 @@ static int goodix_ts_power(struct goodix_ts_data * ts, int on)
{
int ret = -1;
int retry=0;
-
+
unsigned char i2c_control_buf[3] = {0x06,0x92,0x01}; //suspend cmd
-#if 0
-//#ifdef INT_PORT
- if(ts != NULL && !ts->use_irq)
- return -2;
-#endif
+
switch(on)
{
case 0:
@@ -1102,59 +1100,67 @@ static int goodix_ts_power(struct goodix_ts_data * ts, int on)
i2c_end_cmd(ts); //must
return ret;
- case 1:
-
- #ifdef INT_PORT //suggest use INT PORT to wake up !!!
-
- //gpio_direction_output(INT_PORT, 0);
- gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
- gpio_write_one_pin_value(gpio_int_hdle, 0, "ctp_int_port");
- msleep(1);
- // gpio_direction_output(INT_PORT, 1);
- gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
- gpio_write_one_pin_value(gpio_int_hdle, 1, "ctp_int_port");
- msleep(10);
- // gpio_direction_output(INT_PORT, 0);
- gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
- gpio_write_one_pin_value(gpio_int_hdle, 0, "ctp_int_port");
-
- //gpio_free(INT_PORT);
- //s3c_gpio_setpull(INT_PORT, S3C_GPIO_PULL_NONE);
- gpio_set_one_pin_pull(gpio_int_hdle, 0, "ctp_int_port");
+ case 1:
+ #ifdef INT_PORT //suggest use INT PORT to wake up !!!
+ if(STANDBY_WITH_POWER_OFF == standby_level){
+ //reset
+ ctp_ops.ts_reset();
+ //wakeup
+ ctp_ops.ts_wakeup();
-
- if(ts->use_irq) {
- // s3c_gpio_cfgpin(INT_PORT, INT_CFG); //Set IO port as interrupt port
- ret = ctp_ops.set_irq_mode("ctp_para", "ctp_int_port", CTP_IRQ_MODE);
- if(0 != ret){
- printk("%s:ctp_ops.set_irq_mode err. \n", __func__);
- return ret;
- }
- }
- else {
- //gpio_direction_input(INT_PORT);
- //Config CTP_IRQ_NO as input
- gpio_set_one_pin_io_status(gpio_int_hdle,0, "ctp_int_port");
- }
+ //set to input floating
+ gpio_set_one_pin_io_status(gpio_wakeup_hdle, 0, "ctp_wakeup");
- if(STANDBY_WITH_POWER_OFF == standby_level){
for(retry=0; retry<3; retry++)
{
//pr_info("%s: %s, %d. \n", _, __func__, __LINE__);
ret=goodix_init_panel(ts);
pr_info(KERN_INFO"goodix_init_panel ret is :%d\n",ret);
-
if(ret != 0){
//Initiall failed
- msleep(2);
+ msleep(50);
continue;
}
else{
break;
}
-
}
+
+
+ }else if(STANDBY_WITH_POWER == standby_level){
+ //gpio_direction_output(INT_PORT, 0);
+ gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
+ gpio_write_one_pin_value(gpio_int_hdle, 0, "ctp_int_port");
+ msleep(1);
+ // gpio_direction_output(INT_PORT, 1);
+ gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
+ gpio_write_one_pin_value(gpio_int_hdle, 1, "ctp_int_port");
+ msleep(10);
+ // gpio_direction_output(INT_PORT, 0);
+ gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
+ gpio_write_one_pin_value(gpio_int_hdle, 0, "ctp_int_port");
+
+ //gpio_free(INT_PORT);
+ //s3c_gpio_setpull(INT_PORT, S3C_GPIO_PULL_NONE);
+ gpio_set_one_pin_pull(gpio_int_hdle, 0, "ctp_int_port");
+
+
+ if(ts->use_irq) {
+ // s3c_gpio_cfgpin(INT_PORT, INT_CFG); //Set IO port as interrupt port
+ ret = ctp_ops.set_irq_mode("ctp_para", "ctp_int_port", CTP_IRQ_MODE);
+ if(0 != ret){
+ printk("%s:ctp_ops.set_irq_mode err. \n", __func__);
+ return ret;
+ }
+ }
+ else {
+ //gpio_direction_input(INT_PORT);
+ //Config CTP_IRQ_NO as input
+ gpio_set_one_pin_io_status(gpio_int_hdle,0, "ctp_int_port");
+ }
+
+
}
ctp_enable_irq();
@@ -1201,13 +1207,6 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
printk("======goodix_gt818 probe======\n");
//config gpio:
//pr_info("%s: %s, %d. \n", _, __func__, __LINE__);
- gpio_wakeup_hdle = gpio_request_ex("ctp_para", "ctp_wakeup");
- if(!gpio_wakeup_hdle) {
- pr_warning("touch panel tp_wakeup request gpio fail!\n");
- goto exit_gpio_wakeup_request_failed;
- }
-
- //printk("======gt818_addr=0x%x=======\n",client->addr);
//Check I2C function
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
@@ -1240,66 +1239,7 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
//s3c_gpio_setpull(INT_PORT, S3C_GPIO_PULL_NONE);
gpio_set_one_pin_pull(gpio_int_hdle, 0, "ctp_int_port");
#endif
-
-#if defined(NO_DEFAULT_ID) && defined(INT_PORT)
- for(retry=0;retry < 3; retry++)
- {
- //gpio_direction_output(SHUTDOWN_PORT,0);
- gpio_set_one_pin_io_status(gpio_wakeup_hdle, 1, "ctp_wakeup")
- gpio_write_one_pin_value(gpio_wakeup_hdle, 0, "ctp_wakeup");
- msleep(1);
- //gpio_direction_input(SHUTDOWN_PORT);
- gpio_set_one_pin_io_status(gpio_wakeup_hdle, 0, "ctp_wakeup")
- msleep(20);
-
- ret =i2c_write_bytes(client, &test_data, 1); //Test I2C connection.
- if (ret > 0)
- break;
- }
- if(ret <= 0)
- {
- //gpio_direction_output(INT_PORT,0);
- gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
- gpio_write_one_pin_value(gpio_int_hdle, 0, "ctp_int_port");
-
- msleep(1);
- //gpio_direction_output(SHUTDOWN_PORT,0);
- gpio_set_one_pin_io_status(gpio_wakeup_hdle, 1, "ctp_wakeup");
- gpio_write_one_pin_value(gpio_wakeup_hdle, 0, "ctp_wakeup");
- msleep(20);
- //gpio_direction_input(SHUTDOWN_PORT);
- gpio_set_one_pin_io_status(gpio_wakeup_hdle, 0, "ctp_wakeup");
- for(retry=0;retry < 80; retry++)
- {
- ret =i2c_write_bytes(client, &test_data, 1); //Test I2C connection.
- if (ret > 0)
- {
- msleep(10);
- ret =i2c_read_bytes(client, goodix_id, 3); //Test I2C connection.
- if (ret > 0)
- {
- if(goodix_id[2] == 0x55)
- {
- //gpio_direction_output(INT_PORT,1);
- gpio_set_one_pin_io_status(gpio_int_hdle, 1, "ctp_int_port");
- gpio_write_one_pin_value(gpio_int_hdle, 1, "ctp_int_port");
-
-
- msleep(1);
- //gpio_free(INT_PORT);
- //s3c_gpio_setpull(INT_PORT, S3C_GPIO_PULL_NONE);
- gpio_set_one_pin_pull(gpio_int_hdle, 0, "ctp_int_port");
-
- msleep(10);
- break;
- }
- }
- }
-
- }
- }
-#endif
for(retry=0;retry < 3; retry++)
{
@@ -1313,21 +1253,12 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
//output
//gpio_set_one_pin_io_status(gpio_wakeup_hdle, 1, "ctp_wakeup");
//gpio_write_one_pin_value(gpio_wakeup_hdle, 1, "ctp_wakeup");
- //pr_info("%s: %s, %d. \n", _, __func__, __LINE__);
+ //pr_info("%s: %s, %d. \n", __FILE__, __func__, __LINE__);
ret =i2c_write_bytes(client, &test_data, 1); //Test I2C connection.
if (ret > 0)
break;
}
-
- /******
- pr_info("========write_msg=%d=======\n", i2c_write_bytes(client,test_data2,4));
- test_data2[2]=0;
- test_data2[3]=0;
- printk("=====test_data2[2]=%d,test_data2[3]=%d====\n",test_data2[2],test_data2[3]);
- printk("=====read_msg=%d,test_data2[2]=%d,test_data2[3]=%d====\n",i2c_read_bytes(client,test_data2,4),test_data2[2],test_data2[3]);
- ***/
-
if(ret <= 0)
{
dev_err(&client->dev, "Warnning: I2C communication might be ERROR!\n");
@@ -1344,7 +1275,7 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
//gpio_set_one_pin_io_status(gpio_wakeup_hdle, 1, "ctp_wakeup");
//gpio_write_one_pin_value(gpio_wakeup_hdle, 0, "ctp_wakeup");
#ifdef AUTO_UPDATE_GT818
- pr_info("%s: %s, %d. \n", __FILE__, __func__, __LINE__);
+ //pr_info("%s: %s, %d. \n", __FILE__, __func__, __LINE__);
i2c_pre_cmd(ts);
goodix_read_version(ts);
i2c_end_cmd(ts);
@@ -1519,7 +1450,6 @@ err_input_register_device_failed:
err_input_dev_alloc_failed:
i2c_set_clientdata(client, NULL);
-exit_gpio_wakeup_request_failed:
exit_ioremap_failed:
if(gpio_addr){
iounmap(gpio_addr);
diff --git a/drivers/power/axp_power/axp-mfd.c b/drivers/power/axp_power/axp-mfd.c
index 800113a1d61f..7168da51f9a9 100755
--- a/drivers/power/axp_power/axp-mfd.c
+++ b/drivers/power/axp_power/axp-mfd.c
@@ -22,7 +22,6 @@
#include "axp20-mfd.h"
#include <mach/sys_config.h>
-
static int power_start;
int use_cou = 0;
@@ -33,15 +32,23 @@ static void axp_mfd_irq_work(struct work_struct *work)
uint64_t irqs = 0;
while (1) {
- if (chip->ops->read_irqs(chip, &irqs))
+ if (chip->ops->read_irqs(chip, &irqs)){
break;
-
+ }
+
irqs &= chip->irqs_enabled;
- if (irqs == 0)
+ if (irqs == 0){
break;
-
- blocking_notifier_call_chain(
- &chip->notifier_list, irqs, NULL);
+ }
+
+ if(irqs > 0xffffffff){
+ blocking_notifier_call_chain(
+ &chip->notifier_list, (irqs >>32), 1);
+ }
+ else{
+ blocking_notifier_call_chain(
+ &chip->notifier_list, irqs, 0);
+ }
}
enable_irq(chip->client->irq);
}
diff --git a/drivers/power/axp_power/axp-sply.h b/drivers/power/axp_power/axp-sply.h
index a6b98ff5b322..bd41b440ca86 100755
--- a/drivers/power/axp_power/axp-sply.h
+++ b/drivers/power/axp_power/axp-sply.h
@@ -284,7 +284,7 @@ const unsigned int AXP19_NOTIFIER_ON = AXP19_IRQ_USBOV |
#define AXP20_INTTEMP (0x5E)
-const unsigned int AXP20_NOTIFIER_ON = //AXP20_IRQ_USBOV |
+const uint64_t AXP20_NOTIFIER_ON = //AXP20_IRQ_USBOV |
AXP20_IRQ_USBIN |
AXP20_IRQ_USBRE |
//AXP20_IRQ_USBLO |
@@ -295,13 +295,14 @@ const unsigned int AXP20_NOTIFIER_ON = //AXP20_IRQ_USBOV |
//AXP20_IRQ_TEMLO |
AXP20_IRQ_BATIN |
AXP20_IRQ_BATRE |
- AXP20_IRQ_PEKLO |
- AXP20_IRQ_PEKSH |
+ //AXP20_IRQ_PEKLO |
+ //AXP20_IRQ_PEKSH |
AXP20_IRQ_CHAST |
+ AXP20_IRQ_PEKFE |
+ AXP20_IRQ_PEKRE |
AXP20_IRQ_CHAOV;
-
#define AXP_CHG_ATTR(_name) \
{ \
.attr = { .name = #_name,.mode = 0644 }, \
@@ -406,13 +407,13 @@ struct axp_charger {
};
static struct task_struct *main_task;
-static uint8_t coulomb_flag;
+//static uint8_t coulomb_flag;
static struct axp_charger *axp_charger;
-static int Total_Cap = 0;
-static int Cap_Index = 0;
+//static int Total_Cap = 0;
+//static int Cap_Index = 0;
static int flag_state_change = 0;
-static int Bat_Cap_Buffer[AXP20_VOL_MAX];
-static int counter = 0;
+//static int Bat_Cap_Buffer[AXP20_VOL_MAX];
+//static int counter = 0;
static int bat_cap = 0;
#endif
diff --git a/drivers/power/axp_power/axp20-sply-cou.c b/drivers/power/axp_power/axp20-sply-cou.c
index a5f5eac7a441..c87f72b32cd1 100755
--- a/drivers/power/axp_power/axp20-sply-cou.c
+++ b/drivers/power/axp_power/axp20-sply-cou.c
@@ -77,6 +77,7 @@ int axp_usbvolflag = 0;
static int flag_cou = 0;
static int change_flag = 0;
+
void Cou_Count_Clear(struct axp_charger *charger);
void Set_Rest_Cap(struct axp_charger *charger, int rest_cap);
int Get_Bat_Coulomb_Count(struct axp_charger *charger);
@@ -634,6 +635,19 @@ static void axp_pressshort(struct axp_charger *charger)
input_sync(powerkeydev);
}
+static void axp_keyup(struct axp_charger *charger)
+{
+ DBG_PSY_MSG("power key up\n");
+ input_report_key(powerkeydev, KEY_POWER, 0);
+ input_sync(powerkeydev);
+}
+
+static void axp_keydown(struct axp_charger *charger)
+{
+ DBG_PSY_MSG("power key down\n");
+ input_report_key(powerkeydev, KEY_POWER, 1);
+ input_sync(powerkeydev);
+}
static void axp_capchange(struct axp_charger *charger)
{
uint8_t val;
@@ -681,6 +695,7 @@ static int axp_battery_event(struct notifier_block *nb, unsigned long event,
struct axp_charger *charger =
container_of(nb, struct axp_charger, nb);
uint8_t w[9];
+
w[0] = (uint8_t) ((event) & 0xFF);
w[1] = POWER20_INTSTS2;
w[2] = (uint8_t) ((event >> 8) & 0xFF);
@@ -689,31 +704,43 @@ static int axp_battery_event(struct notifier_block *nb, unsigned long event,
w[5] = POWER20_INTSTS4;
w[6] = (uint8_t) ((event >> 24) & 0xFF);
w[7] = POWER20_INTSTS5;
- w[8] = (uint8_t) (((uint64_t) event >> 32) & 0xFF);
+ w[8] = (uint8_t) ((event) & 0xFF);
+// w[8] = (uint8_t) (((uint64_t) event >> 32) & 0xFF);
+ if((bool)data==0){
+ if(event & (AXP20_IRQ_BATIN|AXP20_IRQ_BATRE)) {
+ axp_capchange(charger);
+ }
- if(event & (AXP20_IRQ_BATIN|AXP20_IRQ_BATRE)) {
- axp_capchange(charger);
- }
+ if(event & (AXP20_IRQ_ACIN|AXP20_IRQ_USBIN|AXP20_IRQ_ACOV|AXP20_IRQ_USBOV|AXP20_IRQ_CHAOV
+ |AXP20_IRQ_CHAST|AXP20_IRQ_TEMOV|AXP20_IRQ_TEMLO)) {
+ axp_change(charger);
+ }
- if(event & (AXP20_IRQ_ACIN|AXP20_IRQ_USBIN|AXP20_IRQ_ACOV|AXP20_IRQ_USBOV|AXP20_IRQ_CHAOV
- |AXP20_IRQ_CHAST|AXP20_IRQ_TEMOV|AXP20_IRQ_TEMLO)) {
- axp_change(charger);
- }
+ if(event & (AXP20_IRQ_ACRE|AXP20_IRQ_USBRE)) {
+ axp_change(charger);
+ }
- if(event & (AXP20_IRQ_ACRE|AXP20_IRQ_USBRE)) {
- axp_change(charger);
- }
+ if(event & AXP20_IRQ_PEKLO) {
+ axp_presslong(charger);
+ }
- if(event & AXP20_IRQ_PEKLO) {
- axp_presslong(charger);
+ if(event & AXP20_IRQ_PEKSH) {
+ axp_pressshort(charger);
+ }
}
+ else{
- if(event & AXP20_IRQ_PEKSH) {
- axp_pressshort(charger);
- }
+ if((event) & AXP20_IRQ_PEKFE>>32) {
+ axp_keydown(charger);
+ }
- DBG_PSY_MSG("event = 0x%x\n",(int) event);
+ if((event) & AXP20_IRQ_PEKRE>>32) {
+ axp_keyup(charger);
+ }
+ }
+
axp_writes(charger->master,POWER20_INTSTS1,9,w);
+ DBG_PSY_MSG("%s, %d, event = 0x%x \n", __func__, __LINE__, event);
return 0;
}
diff --git a/drivers/power/axp_power/axp20-sply.c b/drivers/power/axp_power/axp20-sply.c
index cf6f0713b665..cd6b0e337c92 100755
--- a/drivers/power/axp_power/axp20-sply.c
+++ b/drivers/power/axp_power/axp20-sply.c
@@ -225,7 +225,7 @@ static void axp_set_startup_sequence(struct axp_charger *charger)
axp_write(charger->master,0xF4,0x06); //open REGF2/5 Lock
axp_write(charger->master,0xF2,0x04); //open REG10x Lock
axp_write(charger->master,0xFF,0x01);
- axp_write(charger->master,0x03,0x02); //set EXTEN power up at step 2 and 4ms step by step
+ axp_write(charger->master,0x03,0x42); //set EXTEN power up at step 2 and 4ms step by step
// highest 2bit depend the startup time,00-1ms,01-4ms,10-16ms,11-32ms
axp_write(charger->master,0x04,0x08); //set Core-VDD power up at step 2
axp_write(charger->master,0xFF,0x00);
@@ -607,6 +607,20 @@ static void axp_pressshort(struct axp_charger *charger)
input_sync(powerkeydev);
}
+static void axp_keyup(struct axp_charger *charger)
+{
+ DBG_PSY_MSG("power key up\n");
+ input_report_key(powerkeydev, KEY_POWER, 0);
+ input_sync(powerkeydev);
+}
+
+static void axp_keydown(struct axp_charger *charger)
+{
+ DBG_PSY_MSG("power key down\n");
+ input_report_key(powerkeydev, KEY_POWER, 1);
+ input_sync(powerkeydev);
+}
+
static void axp_capchange(struct axp_charger *charger)
{
uint8_t val;
@@ -655,10 +669,11 @@ static int axp_battery_event(struct notifier_block *nb, unsigned long event,
w[3] = POWER20_INTSTS3;
w[4] = (uint8_t) ((event >> 16) & 0xFF);
w[5] = POWER20_INTSTS4;
- w[6] = (uint8_t) ((event >> 24) & 0xFF);
- w[7] = POWER20_INTSTS5;
- w[8] = (uint8_t) (((uint64_t) event >> 32) & 0xFF);
-
+ w[6] = (uint8_t) ((event >> 24) & 0xFF);
+ w[7] = POWER20_INTSTS5;
+ w[8] = (uint8_t) ((event) & 0xFF);
+// w[8] = (uint8_t) (((uint64_t) event >> 32) & 0xFF);
+ if((bool)data==0){
if(event & (AXP20_IRQ_BATIN|AXP20_IRQ_BATRE)) {
axp_capchange(charger);
}
@@ -680,9 +695,20 @@ static int axp_battery_event(struct notifier_block *nb, unsigned long event,
if(event & AXP20_IRQ_PEKSH) {
axp_pressshort(charger);
}
+ }
+ else{
+
+ if((event) & AXP20_IRQ_PEKFE>>32) {
+ axp_keydown(charger);
+ }
- DBG_PSY_MSG("event = 0x%x\n",(int) event);
- axp_writes(charger->master,POWER20_INTSTS1,9,w);
+ if((event) & AXP20_IRQ_PEKRE>>32) {
+ axp_keyup(charger);
+ }
+ }
+
+ axp_writes(charger->master,POWER20_INTSTS1,9,w);
+ DBG_PSY_MSG("%s, %d, event = 0x%x \n", __func__, __LINE__, event);
return 0;
}
diff --git a/drivers/rtc/rtc-sun5i.c b/drivers/rtc/rtc-sun5i.c
index b832d8f96279..dfbe2561a1f5 100755
--- a/drivers/rtc/rtc-sun5i.c
+++ b/drivers/rtc/rtc-sun5i.c
@@ -364,8 +364,8 @@ static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)
ret = i2c_transfer(client->adapter, msgs, 2);
/* read registers */
if (ret != 2) {
- dev_err(&client->dev, "%s: read error,ret:%d\n", __func__,ret);
- return -EIO;
+ printk("%s: read error,ret:%d\n", __func__,ret);
+ return ret;
}
#if 0
@@ -405,8 +405,8 @@ static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)
}
static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
-{
- return pcf8563_get_datetime(to_i2c_client(dev), tm);
+{
+ return pcf8563_get_datetime(to_i2c_client(dev), tm);
}
static int pcf8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -697,8 +697,14 @@ static int pcf8563_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
int month_day;
struct rtc_time tm_now;
unsigned char buf[3];
- struct i2c_client *client = to_i2c_client(dev);
- struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
+ struct i2c_client *client = NULL;
+ struct pcf8563 *pcf8563 = NULL;
+ ret = pcf8563_rtc_read_time(dev, &tm_now);
+ if (ret != 0) {
+ return ret;
+ }
+ client = to_i2c_client(dev);
+ pcf8563 = i2c_get_clientdata(client);
if (client->irq < 0) {
return -EINVAL;
@@ -713,9 +719,6 @@ static int pcf8563_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec);
printk("*****************************\n\n");
#endif
-
- ret = pcf8563_rtc_read_time(dev, &tm_now);
-
#ifdef RTC_ALARM_DEBUG
printk("line:%d,%s the current time: year:%d, month:%d, day:%d. hour:%d.minute:%d.second:%d\n",\
__LINE__, __func__, tm_now.tm_year, tm_now.tm_mon,\
diff --git a/drivers/video/sun5i/disp/de_bsp/bsp_display.h b/drivers/video/sun5i/disp/de_bsp/bsp_display.h
index 08414bb63c2f..fecf6ea697c2 100755
--- a/drivers/video/sun5i/disp/de_bsp/bsp_display.h
+++ b/drivers/video/sun5i/disp/de_bsp/bsp_display.h
@@ -38,6 +38,7 @@
#include <mach/aw_ccu.h>
#include <mach/system.h>
#include <linux/types.h>
+#include <linux/timer.h>
typedef unsigned int __hdle;
diff --git a/drivers/video/sun5i/disp/dev_disp.c b/drivers/video/sun5i/disp/dev_disp.c
index f4c1e45f7848..04b08a671ee3 100755
--- a/drivers/video/sun5i/disp/dev_disp.c
+++ b/drivers/video/sun5i/disp/dev_disp.c
@@ -5,6 +5,7 @@
#include <linux/earlysuspend.h>
#endif
+
fb_info_t g_fbi;
__disp_drv_t g_disp_drv;
@@ -22,6 +23,7 @@ static struct cdev *my_cdev;
static dev_t devid ;
static struct class *disp_class;
+
static struct resource disp_resource[DISP_IO_NUM] =
{
[DISP_IO_SCALER0] = {
@@ -186,6 +188,8 @@ __s32 DRV_lcd_open(__u32 sel)
return 0;
}
+
+
__s32 DRV_lcd_close(__u32 sel)
{
__u32 i = 0;
@@ -214,6 +218,96 @@ __s32 DRV_lcd_close(__u32 sel)
return 0;
}
+//run the last step of lcd open flow(backlight)
+__s32 disp_lcd_open_late(__u32 sel)
+{
+ __lcd_flow_t *flow;
+
+ if(g_disp_drv.b_lcd_open[sel] == 0)
+ {
+ flow = BSP_disp_lcd_get_open_flow(sel);
+ flow->func[flow->func_num-1].func(sel);
+ flow->cur_step = 0;
+
+ BSP_disp_lcd_open_after(sel);
+
+ g_disp_drv.b_lcd_open[sel] = 1;
+ }
+
+ return 0;
+}
+//run lcd close flow accept the first step(backlight)
+__s32 disp_lcd_close_late(__u32 sel)
+{
+ __u32 i = 0;
+ __lcd_flow_t *close_flow;
+ __lcd_flow_t *open_flow;
+
+ if(g_disp_drv.b_lcd_open[sel] == 0)
+ {
+ close_flow = BSP_disp_lcd_get_close_flow(sel);
+ open_flow = BSP_disp_lcd_get_open_flow(sel);
+
+ if(open_flow->cur_step != open_flow->func_num) //if there is task in timer list,cancel it
+ {
+ del_timer(&g_fbi.disp_timer[sel]);
+ }
+ for(i=1; i<close_flow->func_num; i++)
+ {
+ __u32 timeout = close_flow->func[i].delay*HZ/1000;
+
+ close_flow->func[i].func(sel);
+
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(timeout);
+ }
+
+ BSP_disp_lcd_close_after(sel);
+
+ g_disp_drv.b_lcd_open[sel] = 0;
+ }
+ return 0;
+}
+
+void disp_lcd_open_flow_init_status(__u32 sel)
+{
+ __lcd_flow_t *flow;
+
+ flow = BSP_disp_lcd_get_open_flow(sel);
+ flow->cur_step = 0;
+}
+
+void disp_lcd_open_timer(unsigned long sel)
+{
+ __lcd_flow_t *flow;
+ __u32 timeout;
+
+ flow = BSP_disp_lcd_get_open_flow(sel);
+ flow->cur_step = (flow->cur_step == flow->func_num)? 0:flow->cur_step;
+
+ if((g_disp_drv.b_lcd_open[sel] == 0) && (flow->cur_step != flow->func_num-1))
+ {
+
+ if(flow->cur_step == 0)
+ {
+ BSP_disp_lcd_open_before(sel);
+ }
+
+ flow->func[flow->cur_step].func(sel);
+
+ timeout = flow->func[flow->cur_step].delay*HZ/1000;
+ g_fbi.disp_timer[sel].function = &disp_lcd_open_timer;
+ g_fbi.disp_timer[sel].data = sel;//(unsigned int)&g_fbi;
+ g_fbi.disp_timer[sel].expires = jiffies + timeout;
+ add_timer(&g_fbi.disp_timer[sel]);
+ }
+
+ flow->cur_step ++;
+
+ return;
+}
+
+
__s32 disp_set_hdmi_func(__disp_hdmi_func * func)
{
BSP_disp_set_hdmi_func(func);
@@ -378,10 +472,13 @@ ssize_t disp_write(struct file *file, const char __user *buf, size_t count, loff
static int __init disp_probe(struct platform_device *pdev)//called when platform_driver_register
{
fb_info_t * info = NULL;
-
+
__inf("disp_probe call\n");
info = &g_fbi;
+ init_timer(&info->disp_timer[0]);
+ init_timer(&info->disp_timer[1]);
+
info->dev = &pdev->dev;
platform_set_drvdata(pdev,info);
@@ -469,7 +566,22 @@ void backlight_late_resume(struct early_suspend *h)
{
if(suspend_output_type[i] == DISP_OUTPUT_TYPE_LCD)
{
- DRV_lcd_open(i);
+ __lcd_flow_t *flow;
+
+ if(STANDBY_WITH_POWER_OFF == standby_level)//resume from super suspend
+ {
+ flow =BSP_disp_lcd_get_open_flow(i);
+ while(flow->cur_step != flow->func_num)//open flow is finished accept the last one
+ {
+ __u32 timeout = 10*HZ/1000;
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(timeout);
+ }
+ disp_lcd_open_late(i);
+ }else if(STANDBY_WITH_POWER == standby_level)//resume from early suspend
+ {
+ DRV_lcd_open(i);
+ }
}
else if(suspend_output_type[i] == DISP_OUTPUT_TYPE_TV)
{
@@ -486,7 +598,7 @@ void backlight_late_resume(struct early_suspend *h)
}
suspend_status &= (~1);
-
+
printk("display late resume done: %s\n", __func__);
}
@@ -499,14 +611,14 @@ static struct early_suspend backlight_early_suspend_handler =
#endif
-static __u32 image0_reg_bak,image1_reg_bak,scaler0_reg_bak,scaler1_reg_bak;
+static __u32 image0_reg_bak,scaler0_reg_bak;
int disp_suspend(struct platform_device *pdev, pm_message_t state)
{
+ int i = 0;
printk("==disp_suspend call\n");
#ifndef CONFIG_HAS_EARLYSUSPEND
{
- int i = 0;
for(i=0; i<2; i++)
{
@@ -534,15 +646,22 @@ int disp_suspend(struct platform_device *pdev, pm_message_t state)
if(SUPER_STANDBY == standby_type)
{
printk("==disp super standby enter\n");
+
+ if(STANDBY_WITH_POWER_OFF == standby_level)//suspend after resume,not after early suspend
+ {
+ for(i=0; i<2; i++)
+ {
+ if(suspend_output_type[i] == DISP_OUTPUT_TYPE_LCD)
+ {
+ disp_lcd_close_late(i);
+ }
+ }
+ }
image0_reg_bak = (__u32)disp_malloc(0xe00 - 0x800);
- image1_reg_bak = (__u32)disp_malloc(0xe00 - 0x800);
scaler0_reg_bak = (__u32)disp_malloc(0xa18);
- scaler1_reg_bak = (__u32)disp_malloc(0xa18);
BSP_disp_store_image_reg(0, image0_reg_bak);
- BSP_disp_store_image_reg(1, image1_reg_bak);
BSP_disp_store_scaler_reg(0, scaler0_reg_bak);
- BSP_disp_store_scaler_reg(1, scaler1_reg_bak);
}
#ifndef CONFIG_HAS_EARLYSUSPEND
@@ -558,6 +677,7 @@ int disp_suspend(struct platform_device *pdev, pm_message_t state)
int disp_resume(struct platform_device *pdev)
{
+ int i = 0;
printk("==disp_resume call\n");
#ifndef CONFIG_HAS_EARLYSUSPEND
@@ -568,6 +688,7 @@ int disp_resume(struct platform_device *pdev)
if(SUPER_STANDBY == standby_type)
{
+
printk("==disp super standby exit\n");
BSP_disp_restore_scaler_reg(0, scaler0_reg_bak);
@@ -576,11 +697,20 @@ int disp_resume(struct platform_device *pdev)
BSP_disp_restore_tvec_reg(0);
disp_free((void*)scaler0_reg_bak);
disp_free((void*)image0_reg_bak);
+
+ for(i=0; i<2; i++)
+ {
+ if(suspend_output_type[i] == DISP_OUTPUT_TYPE_LCD)
+ {
+ disp_lcd_open_flow_init_status(i);
+ disp_lcd_open_timer(i);//start lcd open flow
+ }
+ }
+
}
#ifndef CONFIG_HAS_EARLYSUSPEND
{
- int i = 0;
BSP_disp_clk_on(3);
diff --git a/drivers/video/sun5i/disp/dev_disp.h b/drivers/video/sun5i/disp/dev_disp.h
index ba913f16f577..9931de9d69ad 100755
--- a/drivers/video/sun5i/disp/dev_disp.h
+++ b/drivers/video/sun5i/disp/dev_disp.h
@@ -43,6 +43,7 @@ typedef struct
__disp_fb_create_para_t fb_para[FB_MAX];
wait_queue_head_t wait[2];
unsigned long wait_count[2];
+ struct timer_list disp_timer[2];
}fb_info_t;
typedef struct
diff --git a/include/linux/drv_display_sun4i.h b/include/linux/drv_display_sun4i.h
index 10d0e066d14c..40156f6d4ac1 100755
--- a/include/linux/drv_display_sun4i.h
+++ b/include/linux/drv_display_sun4i.h
@@ -486,6 +486,7 @@ typedef struct lcd_flow
{
__lcd_function_t func[5];
__u32 func_num;
+ __u32 cur_step;
}__lcd_flow_t;
typedef struct
diff --git a/include/linux/mfd/axp-mfd.h b/include/linux/mfd/axp-mfd.h
index ac09e4489819..63c506e55315 100755
--- a/include/linux/mfd/axp-mfd.h
+++ b/include/linux/mfd/axp-mfd.h
@@ -437,9 +437,9 @@ struct axp_mfd_chip_ops {
#define AXP20_IRQ_GPIO2TG ( 1 << 34)
#define AXP20_IRQ_GPIO3TG ( 1 << 35)
-#define AXP20_IRQ_PEKFE ( 1 << 37)
-#define AXP20_IRQ_PEKRE ( 1 << 38)
-#define AXP20_IRQ_TIMER ( 1 << 39)
+#define AXP20_IRQ_PEKFE ( (uint64_t)1 << 37)
+#define AXP20_IRQ_PEKRE ( (uint64_t)1 << 38)
+#define AXP20_IRQ_TIMER ( (uint64_t)1 << 39)
/* Status Query Interface */
/* AXP18 */
diff --git a/include/linux/printk.h b/include/linux/printk.h
index d6e262e1f1c8..0101d55d9651 100755
--- a/include/linux/printk.h
+++ b/include/linux/printk.h
@@ -306,27 +306,4 @@ static inline void print_hex_dump_bytes(const char *prefix_str, int prefix_type,
#endif
-extern volatile int print_flag;
-
-#define print_call_info(...) ({ \
- do{ \
- if(1 == print_flag){ \
- pr_info("%s: %s, %d. \n", __FILE__, __func__, __LINE__); \
- } \
- \
- } \
- while(0);})
-
-#if 0
-#define my_print_call_info(fmt, args...) ({ \
- do{ \
- if(1 == print_flag){ \
- pr_info("%s: %s, %d. \n", __FILE__, __func__, __LINE__); \
- my_printk(fmt, ##args); \
- } \
- \
- } \
- while(0);})
-#endif
-
#endif
diff --git a/kernel/power/earlysuspend.c b/kernel/power/earlysuspend.c
index de2b1f7fe321..1c0551addc09 100755
--- a/kernel/power/earlysuspend.c
+++ b/kernel/power/earlysuspend.c
@@ -23,13 +23,6 @@
#include "power.h"
-/*
- * notice: if u want to get cycle cnt, u need to include arch related head files.
- * because the way to get cycle cnt is related with arch.
- */
-//#include "./../../arch/arm/mach-sun5i/pm/pm.h"
-#undef GET_CYCLE_CNT
-
enum {
DEBUG_USER_STATE = 1U << 0,
DEBUG_SUSPEND = 1U << 2,
@@ -52,11 +45,6 @@ enum {
};
static int state;
-#ifdef GET_CYCLE_CNT
-static int start = 0;
-static int end = 0;
-#endif
-
#ifdef CONFIG_EARLYSUSPEND_DELAY
extern struct wake_lock ealysuspend_delay_work;
#endif
@@ -114,16 +102,7 @@ static void early_suspend(struct work_struct *work)
if (pos->suspend != NULL) {
if (debug_mask & DEBUG_VERBOSE)
pr_info("early_suspend: calling %pf\n", pos->suspend);
-
-#ifdef GET_CYCLE_CNT
- start = get_cyclecount();
-#endif
pos->suspend(pos);
-#ifdef GET_CYCLE_CNT
- end = get_cyclecount();
- printk("#suspend addr# = #%x#, #start# = #%x#, #end# = #%x#. \n", (unsigned int)(pos->suspend), start, end);
-#endif
-
}
}
standby_level = STANDBY_WITH_POWER;
@@ -165,16 +144,8 @@ static void late_resume(struct work_struct *work)
if (pos->resume != NULL) {
if (debug_mask & DEBUG_VERBOSE)
pr_info("late_resume: calling %pf\n", pos->resume);
-
-#ifdef GET_CYCLE_CNT
- start = get_cyclecount();
-#endif
+
pos->resume(pos);
-#ifdef GET_CYCLE_CNT
- end = get_cyclecount();
- printk("#resume_addr# = #%x#, #start# = #%x#, #end# = #%x# . \n", (unsigned int)(pos->resume), start, end);
-#endif
-
}
}
if (debug_mask & DEBUG_SUSPEND)
diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c
index 769245407e71..4e142f41ccab 100755
--- a/kernel/power/suspend.c
+++ b/kernel/power/suspend.c
@@ -26,15 +26,6 @@
#include <trace/events/power.h>
#include "power.h"
-//#include "./../../arch/arm/mach-sun5i/pm/pm.h"
-#undef GET_CYCLE_CNT
-
-#ifdef GET_CYCLE_CNT
-static int before_syscore_resume = 0;
-static int before_dpm_resume_noirq = 0;
-static int before_test_finish = 0;
-static int before_dpm_resume_end = 0;
-#endif
const char *const pm_states[PM_SUSPEND_MAX] = {
#ifdef CONFIG_EARLYSUSPEND
@@ -180,12 +171,7 @@ static int suspend_enter(suspend_state_t state)
if (!(suspend_test(TEST_CORE) || pm_wakeup_pending())) {
error = suspend_ops->enter(state);
events_check_enabled = false;
-
}
-#ifdef GET_CYCLE_CNT
- before_syscore_resume = get_cyclecount();
- printk("#before_syscore_resume# = #%x#. \n", before_syscore_resume);
-#endif
syscore_resume();
}
@@ -199,10 +185,6 @@ static int suspend_enter(suspend_state_t state)
if (suspend_ops->wake)
suspend_ops->wake();
-#ifdef GET_CYCLE_CNT
- before_dpm_resume_noirq = get_cyclecount();
- printk("#before_dpm_resume_noirq# = #%x#. \n", before_dpm_resume_noirq);
-#endif
dpm_resume_noirq(PMSG_RESUME);
Platform_finish:
@@ -245,16 +227,7 @@ int suspend_devices_and_enter(suspend_state_t state)
Resume_devices:
suspend_test_start();
-#ifdef GET_CYCLE_CNT
- before_dpm_resume_end = get_cyclecount();
- printk("#before_dpm_resume_end# = #%x#. \n", before_dpm_resume_end);
-#endif
dpm_resume_end(PMSG_RESUME);
-
-#ifdef GET_CYCLE_CNT
- before_test_finish = get_cyclecount();
- printk("#before_test_finish# = #%x#. \n", before_test_finish);
-#endif
suspend_test_finish("resume devices");
//resume_console();
Close: