summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJari Helaakoski <tekkuli@gmail.com>2013-01-07 02:04:21 +0400
committerAlejandro Mery <amery@geeks.cl>2013-01-14 14:36:05 +0400
commit623ec8f11cbb8be09c78a2d83fd116a4881d8b01 (patch)
tree61b58e827429ae84be5bc013590ebaf8d50416ac
parent847850078ee063f200bcd9a5651cca104105266d (diff)
downloadlinux-sunxi-623ec8f11cbb8be09c78a2d83fd116a4881d8b01.tar.xz
video:sunxi:disp:Remove struct __disp_tcon_timing_t
Cleanup. Signed-off-by: Jari Helaakoski <tekkuli@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--drivers/video/sunxi/disp/bsp_display.h1
-rw-r--r--drivers/video/sunxi/disp/de_lcdc.c14
-rw-r--r--drivers/video/sunxi/disp/disp_lcd.c74
-rw-r--r--drivers/video/sunxi/disp/ebios_lcdc_tve.h2
-rw-r--r--include/video/sunxi_disp_ioctl.h14
5 files changed, 29 insertions, 76 deletions
diff --git a/drivers/video/sunxi/disp/bsp_display.h b/drivers/video/sunxi/disp/bsp_display.h
index 09c02fdbf9e5..09127d3fb874 100644
--- a/drivers/video/sunxi/disp/bsp_display.h
+++ b/drivers/video/sunxi/disp/bsp_display.h
@@ -237,7 +237,6 @@ extern __s32 LCD_BL_EN(__u32 sel, __bool b_en);
extern __s32 BSP_disp_lcd_user_defined_func(__u32 sel, __u32 para1, __u32 para2,
__u32 para3);
extern __s32 BSP_disp_get_videomode(__u32 sel, struct fb_videomode *videomode);
-extern __s32 BSP_disp_get_timing(__u32 sel, __disp_tcon_timing_t *tt);
extern __u32 BSP_disp_get_cur_line(__u32 sel);
#ifdef CONFIG_ARCH_SUN5I
extern __s32 BSP_disp_close_lcd_backlight(__u32 sel);
diff --git a/drivers/video/sunxi/disp/de_lcdc.c b/drivers/video/sunxi/disp/de_lcdc.c
index 1db9829f7ecf..100a2d8ad5e1 100644
--- a/drivers/video/sunxi/disp/de_lcdc.c
+++ b/drivers/video/sunxi/disp/de_lcdc.c
@@ -181,7 +181,7 @@ __s32 LCDC_clear_int(__u32 sel, __u32 irqsrc)
return 0;
}
-__s32 LCDC_get_timing(__u32 sel, __u32 index, __disp_tcon_timing_t *tt)
+__s32 LCDC_get_timing(__u32 sel, __u32 index, struct fb_videomode *videomode)
{
__u32 reg0, reg1, reg2, reg3;
__u32 x, y, ht, hbp, vt, vbp, hspw, vspw;
@@ -207,17 +207,17 @@ __s32 LCDC_get_timing(__u32 sel, __u32 index, __disp_tcon_timing_t *tt)
vspw = (reg3 >> 0) & 0x3ff;
/* left margin */
- tt->hor_back_porch = (hbp + 1) - (hspw + 1);
+ videomode->left_margin = (hbp + 1) - (hspw + 1);
/* right margin */
- tt->hor_front_porch = (ht + 1) - (x + 1) - (hbp + 1);
+ videomode->right_margin = (ht + 1) - (x + 1) - (hbp + 1);
/* upper margin */
- tt->ver_back_porch = (vbp + 1) - (vspw + 1);
+ videomode->upper_margin = (vbp + 1) - (vspw + 1);
/* lower margin */
- tt->ver_front_porch = (vt / 2) - (y + 1) - (vbp + 1);
+ videomode->lower_margin = (vt / 2) - (y + 1) - (vbp + 1);
/* hsync_len */
- tt->hor_sync_time = (hspw + 1);
+ videomode->hsync_len = (hspw + 1);
/* vsync_len */
- tt->ver_sync_time = (vspw + 1);
+ videomode->vsync_len = (vspw + 1);
return 0;
}
diff --git a/drivers/video/sunxi/disp/disp_lcd.c b/drivers/video/sunxi/disp/disp_lcd.c
index cb4128ee023d..312f783458e7 100644
--- a/drivers/video/sunxi/disp/disp_lcd.c
+++ b/drivers/video/sunxi/disp/disp_lcd.c
@@ -1818,19 +1818,23 @@ EXPORT_SYMBOL(LCD_set_panel_funs);
__s32 BSP_disp_get_videomode(__u32 sel, struct fb_videomode *videomode)
{
- __disp_tcon_timing_t tt;
- bool interlaced, hsync, vsync = false;
+ bool interlaced = false, hsync = false, vsync = false;
u32 pixclock, hfreq, htotal, vtotal;
memset(videomode, 0, sizeof(struct fb_videomode));
- if (BSP_disp_get_timing(sel, &tt) != 0)
- return DIS_FAIL;
-
if (gdisp.screen[sel].status & LCD_ON) {
+ LCDC_get_timing(sel, 0, videomode);
+ videomode->pixclock = KHZ2PICOS(
+ gpanel_info[sel].lcd_dclk_freq * 1000);
interlaced = false;
} else if ((gdisp.screen[sel].status & TV_ON)) {
- interlaced = Disp_get_screen_scan_mode(
- gdisp.screen[sel].tv_mode);
+ __disp_tv_mode_t tv_mode = gdisp.screen[sel].tv_mode;
+ LCDC_get_timing(sel, 1, videomode);
+ videomode->pixclock = KHZ2PICOS(
+ (clk_tab.tv_clk_tab[tv_mode].tve_clk /
+ clk_tab.tv_clk_tab[tv_mode].pre_scale) / 1000);
+
+ interlaced = Disp_get_screen_scan_mode(tv_mode);
} else if (gdisp.screen[sel].status & HDMI_ON) {
struct __disp_video_timing video_timing;
__disp_tv_mode_t hdmi_mode = gdisp.screen[sel].hdmi_mode;
@@ -1838,12 +1842,20 @@ __s32 BSP_disp_get_videomode(__u32 sel, struct fb_videomode *videomode)
hdmi_mode, &video_timing) != 0)
return DIS_FAIL;
+ LCDC_get_timing(sel, 1, videomode);
+ videomode->pixclock = KHZ2PICOS(video_timing.PCLK / 1000);
interlaced = video_timing.I;
hsync = video_timing.HSYNC;
vsync = video_timing.VSYNC;
} else if (gdisp.screen[sel].status & VGA_ON) {
- interlaced = Disp_get_screen_scan_mode(
- gdisp.screen[sel].vga_mode);
+ __disp_vga_mode_t vga_mode = gdisp.screen[sel].vga_mode;
+
+ LCDC_get_timing(sel, 1, videomode);
+
+ videomode->pixclock = KHZ2PICOS(
+ (clk_tab.vga_clk_tab[vga_mode].tve_clk /
+ clk_tab.vga_clk_tab[vga_mode].pre_scale) / 1000);
+ interlaced = Disp_get_screen_scan_mode(vga_mode);
} else {
DE_INF("get videomode fail because device is not output !\n");
return DIS_FAIL;
@@ -1851,14 +1863,6 @@ __s32 BSP_disp_get_videomode(__u32 sel, struct fb_videomode *videomode)
videomode->xres = BSP_disp_get_screen_width(sel);
videomode->yres = BSP_disp_get_screen_height(sel);
- videomode->pixclock = KHZ2PICOS(tt.pixel_clk);
- videomode->left_margin = tt.hor_back_porch;
- videomode->right_margin = tt.hor_front_porch;
- videomode->upper_margin = tt.ver_back_porch;
- videomode->lower_margin = tt.ver_front_porch;
- videomode->hsync_len = tt.hor_sync_time;
- videomode->vsync_len = tt.ver_sync_time;
-
if (interlaced)
videomode->vmode = FB_VMODE_INTERLACED;
@@ -1889,42 +1893,6 @@ __s32 BSP_disp_get_videomode(__u32 sel, struct fb_videomode *videomode)
return DIS_SUCCESS;
}
-__s32 BSP_disp_get_timing(__u32 sel, __disp_tcon_timing_t *tt)
-{
- memset(tt, 0, sizeof(__disp_tcon_timing_t));
-
- if (gdisp.screen[sel].status & LCD_ON) {
- LCDC_get_timing(sel, 0, tt);
- tt->pixel_clk = gpanel_info[sel].lcd_dclk_freq * 1000;
- } else if ((gdisp.screen[sel].status & TV_ON)) {
- __disp_tv_mode_t mode = gdisp.screen[sel].tv_mode;
- LCDC_get_timing(sel, 1, tt);
- tt->pixel_clk =
- (clk_tab.tv_clk_tab[mode].tve_clk /
- clk_tab.tv_clk_tab[mode].pre_scale) / 1000;
- } else if (gdisp.screen[sel].status & HDMI_ON) {
- struct __disp_video_timing video_timing;
- __disp_tv_mode_t hdmi_mode = gdisp.screen[sel].hdmi_mode;
-
- LCDC_get_timing(sel, 1, tt);
- if (gdisp.init_para.hdmi_get_video_timing(
- hdmi_mode, &video_timing) == 0)
- tt->pixel_clk = video_timing.PCLK / 1000;
- } else if (gdisp.screen[sel].status & VGA_ON) {
- __disp_vga_mode_t mode = gdisp.screen[sel].vga_mode;
-
- LCDC_get_timing(sel, 1, tt);
- tt->pixel_clk =
- (clk_tab.vga_clk_tab[mode].tve_clk /
- clk_tab.vga_clk_tab[mode].pre_scale) / 1000;
- } else {
- DE_INF("get timing fail because device is not output !\n");
- return -1;
- }
-
- return 0;
-}
-
__u32 BSP_disp_get_cur_line(__u32 sel)
{
__u32 line = 0;
diff --git a/drivers/video/sunxi/disp/ebios_lcdc_tve.h b/drivers/video/sunxi/disp/ebios_lcdc_tve.h
index 5a69422b15b1..4dfe17c2f344 100644
--- a/drivers/video/sunxi/disp/ebios_lcdc_tve.h
+++ b/drivers/video/sunxi/disp/ebios_lcdc_tve.h
@@ -131,7 +131,7 @@ void LCDC_open(__u32 sel);
void LCDC_close(__u32 sel);
__s32 LCDC_set_int_line(__u32 sel, __u32 tcon_index, __u32 num);
__s32 LCDC_clear_int(__u32 sel, __u32 irqsrc);
-__s32 LCDC_get_timing(__u32 sel, __u32 index, __disp_tcon_timing_t *tt);
+__s32 LCDC_get_timing(__u32 sel, __u32 index, struct fb_videomode *videomode);
__s32 LCDC_enable_int(__u32 sel, __u32 irqsrc);
__s32 LCDC_disable_int(__u32 sel, __u32 irqsrc);
__u32 LCDC_query_int(__u32 sel);
diff --git a/include/video/sunxi_disp_ioctl.h b/include/video/sunxi_disp_ioctl.h
index 36fc7d3f0015..5ba03b2e61c9 100644
--- a/include/video/sunxi_disp_ioctl.h
+++ b/include/video/sunxi_disp_ioctl.h
@@ -544,20 +544,6 @@ typedef struct {
} __panel_para_t;
typedef struct {
- __u32 pixel_clk; /* khz */
- __u32 hor_pixels;
- __u32 ver_pixels;
- __u32 hor_total_time;
- __u32 hor_front_porch;
- __u32 hor_sync_time;
- __u32 hor_back_porch;
- __u32 ver_total_time;
- __u32 ver_front_porch;
- __u32 ver_sync_time;
- __u32 ver_back_porch;
-} __disp_tcon_timing_t;
-
-typedef struct {
__u32 base_lcdc0;
__u32 base_lcdc1;
__u32 base_pioc;