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| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-11-20 19:13:22 +0300 |
|---|---|---|
| committer | Emil Renner Berthing <emil.renner.berthing@canonical.com> | 2024-05-28 13:42:33 +0300 |
| commit | 67b3fbe1f4bc2b020382d3f1c5990d7089b876a2 (patch) | |
| tree | af252a81240d9e20076af9144a3952f8ed0ef7fd | |
| parent | 4b8b81e7e33b8edb0f2d24a2ce98e39abe10b0fe (diff) | |
| download | linux-67b3fbe1f4bc2b020382d3f1c5990d7089b876a2.tar.xz | |
riscv: dts: starfive: Add StarFive JH7100 audio clock node
Add device tree node for the audio clocks on the StarFive JH7100 RISC-V
SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index aecb73d25aa7..f260c0005312 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -239,6 +239,16 @@ }; }; + audclk: clock-controller@10480000 { + compatible = "starfive,jh7100-audclk"; + reg = <0x0 0x10480000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_AUDIO_SRC>, + <&clkgen JH7100_CLK_AUDIO_12288>, + <&clkgen JH7100_CLK_DOM7AHB_BUS>; + clock-names = "audio_src", "audio_12288", "dom7ahb_bus"; + #clock-cells = <1>; + }; + clkgen: clock-controller@11800000 { compatible = "starfive,jh7100-clkgen"; reg = <0x0 0x11800000 0x0 0x10000>; |