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author | Doug Brown <doug@schmorgal.com> | 2022-06-12 22:29:28 +0300 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2022-09-30 23:34:06 +0300 |
commit | 260d2f347b765422584a5fa5209b8ecd17d773b4 (patch) | |
tree | cb10ee4007fd9235c7fcdec2e652b3f6762788e4 | |
parent | a77a1e2f1b00ec3385523283b8fcbd56ed166797 (diff) | |
download | linux-260d2f347b765422584a5fa5209b8ecd17d773b4.tar.xz |
dt-bindings: marvell,pxa168: add clock ids for additional dividers
This adds a few new clocks divided from PLL1 and CLK32 that are
potentially used by a few peripherals with muxed clocks.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-4-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | include/dt-bindings/clock/marvell,pxa168.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/marvell,pxa168.h b/include/dt-bindings/clock/marvell,pxa168.h index db2b41f1b127..8686bc7bf7b6 100644 --- a/include/dt-bindings/clock/marvell,pxa168.h +++ b/include/dt-bindings/clock/marvell,pxa168.h @@ -20,8 +20,11 @@ #define PXA168_CLK_PLL1_2_1_5 19 #define PXA168_CLK_PLL1_3_16 20 #define PXA168_CLK_PLL1_192 21 +#define PXA168_CLK_PLL1_2_1_10 22 +#define PXA168_CLK_PLL1_2_3_16 23 #define PXA168_CLK_UART_PLL 27 #define PXA168_CLK_USB_PLL 28 +#define PXA168_CLK_CLK32_2 50 /* apb peripherals */ #define PXA168_CLK_TWSI0 60 |