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authorLinus Torvalds <torvalds@linux-foundation.org>2023-11-02 04:06:28 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2023-11-02 04:06:28 +0300
commit4684e928dbee00d625b5102ea23c216cc2d85f46 (patch)
tree29a2a7d6c63bdd0be2ca4324c91d371b34932750
parenta39ba9b429a4671913e79da9d6a20476f10796b1 (diff)
parenta9838799e2fa9fedd77867942e661b657d5591a0 (diff)
downloadlinux-4684e928dbee00d625b5102ea23c216cc2d85f46.tar.xz
Merge tag 'soc-arm-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC code updates from Arnd Bergmann: "The AMD Pensando DPU platform gets added to arm64, and some minor updates make it into Renesas' 32-bit platforms" * tag 'soc-arm-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm: debug: reuse the config DEBUG_OMAP2UART{1,2} for OMAP{3,4,5} arm64: Add config for AMD Pensando SoC platforms MAINTAINERS: Add entry for AMD PENSANDO ARM: shmobile: sh73a0: Reserve boot area when SMP is enabled ARM: shmobile: r8a7779: Reserve boot area when SMP is enabled ARM: shmobile: rcar-gen2: Reserve boot area when SMP is enabled ARM: shmobile: rcar-gen2: Remove unneeded once handling
-rw-r--r--MAINTAINERS7
-rw-r--r--arch/arm/Kconfig.debug12
-rw-r--r--arch/arm/mach-shmobile/pm-rcar-gen2.c5
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c9
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c10
-rw-r--r--arch/arm64/Kconfig.platforms12
6 files changed, 42 insertions, 13 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 51e6ae3f4f13..f7fa0e151633 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1826,6 +1826,13 @@ N: allwinner
N: sun[x456789]i
N: sun[25]0i
+ARM/AMD PENSANDO ARM64 ARCHITECTURE
+M: Brad Larson <blarson@amd.com>
+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S: Supported
+F: Documentation/devicetree/bindings/*/amd,pensando*
+F: arch/arm64/boot/dts/amd/elba*
+
ARM/Amlogic Meson SoC CLOCK FRAMEWORK
M: Neil Armstrong <neil.armstrong@linaro.org>
M: Jerome Brunet <jbrunet@baylibre.com>
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b407b7b9b715..fc2b41d41447 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1593,10 +1593,8 @@ config DEBUG_UART_PHYS
default 0x48020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
default 0x48022000 if DEBUG_TI81XXUART2
default 0x48024000 if DEBUG_TI81XXUART3
- default 0x4806a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
- DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
- default 0x4806c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
- DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
+ default 0x4806a000 if DEBUG_OMAP2UART1
+ default 0x4806c000 if DEBUG_OMAP2UART2
default 0x4806e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
default 0x49020000 if DEBUG_OMAP3UART3
default 0x49042000 if DEBUG_OMAP3UART4
@@ -1719,10 +1717,8 @@ config DEBUG_UART_VIRT
default 0xfa020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
default 0xfa022000 if DEBUG_TI81XXUART2
default 0xfa024000 if DEBUG_TI81XXUART3
- default 0xfa06a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
- DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
- default 0xfa06c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
- DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
+ default 0xfa06a000 if DEBUG_OMAP2UART1
+ default 0xfa06c000 if DEBUG_OMAP2UART2
default 0xfa06e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
default 0xfa71e000 if DEBUG_QCOM_UARTDM
default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index 672081405a7e..907a4f8c5aed 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -46,15 +46,16 @@ void __init rcar_gen2_pm_init(void)
{
void __iomem *p;
u32 bar;
- static int once;
struct device_node *np;
bool has_a7 = false;
bool has_a15 = false;
struct resource res;
int error;
- if (once++)
+ if (!request_mem_region(0, SZ_256K, "Boot Area")) {
+ pr_err("Failed to request boot area\n");
return;
+ }
for_each_of_cpu_node(np) {
if (of_device_is_compatible(np, "arm,cortex-a15"))
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 1bc609986c16..474c325323a3 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -38,7 +38,14 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
{
- void __iomem *base = ioremap(HPBREG_BASE, 0x1000);
+ void __iomem *base;
+
+ if (!request_mem_region(0, SZ_4K, "Boot Area")) {
+ pr_err("Failed to request boot area\n");
+ return;
+ }
+
+ base = ioremap(HPBREG_BASE, 0x1000);
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
writel(__pa(shmobile_boot_vector), base + AVECR);
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 453d48865029..9196b37ea292 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -44,10 +44,16 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
- void __iomem *ap = ioremap(AP_BASE, PAGE_SIZE);
- void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);
+ void __iomem *ap, *sysc;
+
+ if (!request_mem_region(0, SZ_4K, "Boot Area")) {
+ pr_err("Failed to request boot area\n");
+ return;
+ }
/* Map the reset vector (in headsmp.S) */
+ ap = ioremap(AP_BASE, PAGE_SIZE);
+ sysc = ioremap(SYSC_BASE, PAGE_SIZE);
writel(0, ap + APARMBAREA); /* 4k */
writel(__pa(shmobile_boot_vector), sysc + SBAR);
iounmap(sysc);
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 6069120199bb..24335565bad5 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -244,6 +244,18 @@ config ARCH_NPCM
General support for NPCM8xx BMC (Arbel).
Nuvoton NPCM8xx BMC based on the Cortex A35.
+config ARCH_PENSANDO
+ bool "AMD Pensando Platforms"
+ help
+ This enables support for the ARMv8 based AMD Pensando SoC
+ family to include the Elba SoC.
+
+ AMD Pensando SoCs support a range of Distributed Services
+ Cards in PCIe format installed into servers. The Elba
+ SoC includes 16 Cortex A-72 CPU cores, 144 P4-programmable
+ cores for a minimal latency/jitter datapath, and network
+ interfaces up to 200 Gb/s.
+
config ARCH_QCOM
bool "Qualcomm Platforms"
select GPIOLIB