diff options
| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2024-02-12 16:10:14 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-04-16 04:54:03 +0300 |
| commit | 6e4f7e53991ca7e70dc7d5d9d66c833091e1f6ae (patch) | |
| tree | cc4226fa7791699f39e821fd95302c6e2b86f2b8 | |
| parent | d18b5477dcea7775a562b3ba7aaa68772c8980ba (diff) | |
| download | linux-6e4f7e53991ca7e70dc7d5d9d66c833091e1f6ae.tar.xz | |
arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent
In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240210-topic-1v-v1-6-fda0db38e29b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index a72627f4d8cd..5adb9b178b05 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3245,6 +3245,7 @@ snps,usb2-lpm-disable; snps,has-lpm-erratum; tx-fifo-resize; + dma-coherent; ports { #address-cells = <1>; |