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| author | Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> | 2022-05-07 07:02:56 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-11 00:53:13 +0300 |
| commit | 7e0357fcf86c4bb237e2fbde77588549fb5af24c (patch) | |
| tree | d65113e0c3b3ca70040f39a4b7586806e322375c | |
| parent | e91241c0306dba4b04cc84b6b4748d5a1279285f (diff) | |
| download | linux-7e0357fcf86c4bb237e2fbde77588549fb5af24c.tar.xz | |
drm/amdgpu/jpeg: add jpeg ras poison consumption handling
Add jpeg ras poison event callback and consumption handling
V2: Removed the default poison consumption cb handle
Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h | 3 |
4 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c index 9342aa23ebd2..518eb0e40d32 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c @@ -216,3 +216,21 @@ int amdgpu_jpeg_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: return r; } + +int amdgpu_jpeg_process_poison_irq(struct amdgpu_device *adev, + struct amdgpu_irq_src *source, + struct amdgpu_iv_entry *entry) +{ + struct ras_common_if *ras_if = adev->jpeg.ras_if; + struct ras_dispatch_if ih_data = { + .entry = entry, + }; + + if (!ras_if) + return 0; + + ih_data.head = *ras_if; + amdgpu_ras_interrupt_dispatch(adev, &ih_data); + + return 0; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h index b6c7fb00e05a..635dca59a70a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h @@ -69,4 +69,8 @@ void amdgpu_jpeg_ring_end_use(struct amdgpu_ring *ring); int amdgpu_jpeg_dec_ring_test_ring(struct amdgpu_ring *ring); int amdgpu_jpeg_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout); +int amdgpu_jpeg_process_poison_irq(struct amdgpu_device *adev, + struct amdgpu_irq_src *source, + struct amdgpu_iv_entry *entry); + #endif /*__AMDGPU_JPEG_H__*/ diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c index c2bf036a7330..f87d0f6ffc93 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c @@ -99,6 +99,18 @@ static int jpeg_v2_5_sw_init(void *handle) VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst[i].irq); if (r) return r; + + /* JPEG DJPEG POISON EVENT */ + r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i], + VCN_2_6__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].irq); + if (r) + return r; + + /* JPEG EJPEG POISON EVENT */ + r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i], + VCN_2_6__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].irq); + if (r) + return r; } r = amdgpu_jpeg_sw_init(adev); @@ -573,6 +585,10 @@ static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev, case VCN_2_0__SRCID__JPEG_DECODE: amdgpu_fence_process(&adev->jpeg.inst[ip_instance].ring_dec); break; + case VCN_2_6__SRCID_DJPEG0_POISON: + case VCN_2_6__SRCID_EJPEG0_POISON: + amdgpu_jpeg_process_poison_irq(adev, source, entry); + break; default: DRM_ERROR("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]); diff --git a/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h b/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h index 17acac147013..f842eb0d65bb 100644 --- a/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h +++ b/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h @@ -29,4 +29,7 @@ #define VCN_2_0__SRCID__JPEG_ENCODE 151 // 0x97 JRBC Encode interrupt #define VCN_2_0__SRCID__JPEG_DECODE 153 // 0x99 JRBC Decode interrupt +#define VCN_2_6__SRCID_DJPEG0_POISON 161 +#define VCN_2_6__SRCID_EJPEG0_POISON 162 + #endif |