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authorVipin Kumar <vipin.kumar@st.com>2012-03-14 10:17:10 +0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-03-27 03:58:25 +0400
commitaea686b47c0cf97e0c6941799b523b6df87fc234 (patch)
tree63df7ffd72eff18739993709768ea86b039e1dbe
parent4cbe1bf07a4dfc3ec2d81c4e8aee832384997bc4 (diff)
downloadlinux-aea686b47c0cf97e0c6941799b523b6df87fc234.tar.xz
mtd: nand/fsmc: Read only 512 + 13 bytes for 8bit NAND devices
The ECC logic of FSMC works on 512 bytes data + 13 bytes ECC to generate error indices of up to 8 incorrect bits. The FSMC driver reads 14 instead of 13 oob bytes to accommodate for 16 bit device as well. Unfortunately, the internal ecc state machine gets corrupted for 8 bit devices reading 512 + 14 bytes of data resulting in error indices not getting reported. Fix this by reading 14 bytes only for 16 bit devices Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/fsmc_nand.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 902ba0d9c32d..bd423390d330 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -549,7 +549,9 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
* to read at least 13 bytes even in case of 16 bit NAND
* devices
*/
- len = roundup(len, 2);
+ if (chip->options & NAND_BUSWIDTH_16)
+ len = roundup(len, 2);
+
chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page);
chip->read_buf(mtd, oob + j, len);
j += len;