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| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2024-02-12 16:10:13 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-04-16 04:54:03 +0300 |
| commit | d18b5477dcea7775a562b3ba7aaa68772c8980ba (patch) | |
| tree | de4fc23cfbba7b8929b6da7dad86521918ffb195 | |
| parent | 93395f9a8d52b89868d75e278adaf002f99dec22 (diff) | |
| download | linux-d18b5477dcea7775a562b3ba7aaa68772c8980ba.tar.xz | |
arm64: dts: qcom: sm8550: Add missing DWC3 quirks
As expected, Qualcomm DWC3 implementation come with a sizable number
of quirks. Make sure to account for all of them.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240210-topic-1v-v1-5-fda0db38e29b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index d60984d5ae4d..a72627f4d8cd 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3231,12 +3231,20 @@ reg = <0x0 0x0a600000 0x0 0xcd00>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; iommus = <&apps_smmu 0x40 0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - snps,usb3_lpm_capable; phys = <&usb_1_hsphy>, <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,usb2-gadget-lpm-disable; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,is-utmi-l1-suspend; + snps,usb3_lpm_capable; + snps,usb2-lpm-disable; + snps,has-lpm-erratum; + tx-fifo-resize; ports { #address-cells = <1>; |