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| author | Gabriel Fernandez <gabriel.fernandez@st.com> | 2016-12-13 17:20:18 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-12-22 03:09:12 +0300 |
| commit | 844ca23f5b2e9db925aa5fe0daa5d1d887dba84d (patch) | |
| tree | 959da94d6ee37ca14d0b51e7952e0cb58998b7e5 /CREDITS | |
| parent | 62710c121b262fb8fe26d50179ab407e421969ed (diff) | |
| download | linux-844ca23f5b2e9db925aa5fe0daa5d1d887dba84d.tar.xz | |
clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board
In the stm32f469 soc, the 48Mhz clock could be derived from pll-q or
from pll-sai-p.
The SDIO clock could be also derived from 48Mhz or from sys clock.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions